SpaceX-posted 2 months ago
$160,000 - $220,000/Yr
Full-time • Mid Level
Redmond, WA
Transportation Equipment Manufacturing

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. We are seeking a motivated, proactive, and intellectually curious AMS Verification Engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation RFICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Join us to help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.

  • Develop and own 'analog-on-top' and 'digital-on-top' design verification flows for full-chip simulations of in-house RFICs and RF-SoCs
  • Develop testbenches and flows to simulate critical interfaces between RFICs/SoCs
  • Work with designers to improve speed/accuracy of simulations for advanced mixed-signal IPs (PLLs, DACs, ADCs, etc.)
  • Work with designers to create behavioral models of RF/analog/mixed-mode circuit blocks, and employ these models in chip verification
  • Work with ATE test engineering team to develop and prototype testplans
  • Setup and run EM/IR simulations
  • Bachelor's degree in an engineering discipline
  • 5+ years of research and/or industry experience in the field of integrated circuit design/verification
  • Master's degree or PhD in an engineering discipline with emphasis in integrated circuit design/verification
  • Experience with AMS simulation tools and flows
  • Experience with annotated gate-level simulation within an AMS simulator
  • Experience in System-Verilog, UVM, Python
  • Experience in writing behavioral models for analog/mixed-mode IPs in Verilog-A/AMS
  • Understanding of analog circuit fundamentals, and experience simulating circuits such as LDOs, bandgaps, DACs, ADCs, baseband amplifiers, mixers, RF amplifiers, oscillators, PLLs, etc.
  • Understanding of combinational logic and basic digital circuit blocks, such as flip-flops, counters, buffers, synchronizers, serializers/de-serializers, etc.; ability to understand RTL and gate-level netlists
  • Pay range: AMS Verification Engineer/Senior: $160,000.00 - $220,000.00/per year
  • Long-term incentives, in the form of company stock, stock options, or long-term cash awards
  • Potential discretionary bonuses
  • Ability to purchase additional stock at a discount through an Employee Stock Purchase Plan
  • Comprehensive medical, vision, and dental coverage
  • Access to a 401(k) retirement plan
  • Short & long-term disability insurance
  • Life insurance
  • Paid parental leave
  • Various other discounts and perks
  • Accrue 3 weeks of paid vacation
  • Eligible for 10 or more paid holidays per year
  • Eligible for 5 days of sick leave per year
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