ASML US brings together the most creative minds in science and technology to develop lithography machines that are key to producing faster, cheaper, more energy-efficient microchips. We design, develop, integrate, market and service these advanced machines, which enable our customers - the world’s leading chipmakers - to reduce the size and increase the functionality of their microchips, which in turn leads to smaller, more powerful consumer electronics. Our headquarters are in Veldhoven, the Netherlands, and we have 18 office locations around the United States including main offices in Chandler, Arizona, San Jose and San Diego, California, Wilton, Connecticut, and Hillsboro, Oregon. The SwOps ‘Bench Top Engineer’ (BTE) / Scanner Simulator Engineer’ (SSE) will be responsible for defining, designing, implementing, testing, delivering, tracking, and providing status on ‘All’ Bench Top Task Force’s (BTTF) Deliverables. These deliverables include, but are not limited to Designing, Building, Modifying, Testing, Validating, and Debugging of a variety of the Software Development (SDev) and Software Integration (SInt) Groups’ Bench Tops, ½ Racks, Scanner Simulators, and ‘Stand-Alone’ Test Equipment. The BTE / SSE will be required to Support and Execute the ‘Deliverables’ specified in the ‘BTTF Road Map’ by Analyzing, Writing, and Executing ‘Complex’ Manual’ and ‘Automated Test ‘Setup’ Procedures, Maintaining Test Automation Python Scripts, Creating/Maintaining Test Documentation, Assisting/Supporting Debugging and Modification of Software, Creating/Executing ‘Software Commissioning’ on Test Benches, ‘Qualifying’ SCS Creating, Releasing, and Maintaining BT & SCS Schematics, Component Layouts, Bills of Material (BOM), Analyzing/Documenting Test Results to ensure existing functionality, Recommending Corrective Actions as needed, Debugging/Troubleshooting Issues, and Consulting with Development Engineers to expeditiously ‘Resolve Issues.
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Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees