SoC Logic Design Engineer

Altera Semiconductor • Austin, TX

15h

About The Position

About Altera: Accelerating Innovators — Altera provides leadership programmable solutions that are easy to use and deploy, across the cloud to the edge, enabling limitless possibilities for AI. Our broad portfolio includes FPGAs, SoCs, CPLDs, IP, development tools, system-on-modules, SmartNICs and IPUs, offering the flexibility to accelerate innovation. Our innovation in programmable logic began in 1983. Since then we’ve delivered the tools and technologies that empower customers to innovate, differentiate, and succeed in their markets. Join us on our journey to becoming the world’s #1 FPGA company! About the Role: Altera is seeking an experienced SoC Logic Design Engineer to develop and integrate logic design, register transfer level (RTL) coding, and simulation for complex SoC designs. This role involves working on integrating IP blocks and subsystems into a full-chip SoC or discrete component design, while ensuring the highest quality standards in logic design, power, performance, and area optimization.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
• Minimum 7 years of experience in integrating ARM advanced cores and related ARM IP.
• Strong expertise in coherent interconnect design and integration.
• Proven experience as an SoC integrator, handling complex SoC-level integration tasks.
• Demonstrated experience as a lead micro-architect in SoC design.
• Knowledge of Design for Test (DFT), physical design, and verification methodologies.
• Proficiency in static timing analysis and optimization.
• Strong understanding of security best practices in hardware design.

Responsibilities

• Develop RTL designs for SoC integration, ensuring efficient and optimized logic implementation.
• Participate in defining architecture and microarchitecture features of designated blocks.
• Conduct thorough quality checks across various aspects of logic design, including RTL validation, timing, and power convergence.
• Apply advanced strategies, tools, and methods to optimize RTL for power, performance, area, and timing goals.
• Ensure verification plan and implementation correctly validate design features.
• Identify and resolve RTL issues to maintain design integrity and compliance with security best practices.
• Work closely with IP providers to integrate and validate IPs at the SoC level.
• Ensure smooth IP-SoC handoff through rigorous quality assurance compliance.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level