SoC DRAM Memory Subsystem Validation Engineering Program Manager

Apple • Cupertino, CA

9h

About The Position

Join the team that crafts Apple's groundbreaking silicon, contributing to the development of the world's greatest SoCs. This role involves improving the processes used to develop these sophisticated SoCs as the team expands and matures. The SoC DRAM Memory Subsystem Validation and Debug Program Manager will be responsible for driving the memory subsystem readiness for custom SoCs, which feature high-bandwidth multi-client memory subsystems. The charter includes managing the bring-up, validation, and complex debug of the memory subsystem. The Engineering Program Manager (EPM) will also contribute to shaping the DRAM industry’s mobile roadmap and driving innovative DRAM technologies across Apple’s product lines. This multifaceted role serves as a critical interface between Apple’s DRAM architecture, Memory Controller Design and DV, DDR PHY, DRAM product engineering, and software teams, ensuring that advanced memory technologies meet Apple’s industry-leading quality standards from architecture to mass production.

Requirements

• BS + 3 years of relevant experience
• Prior experience in SOC DRAM Memory Design, Validation, Architecture or Test/Product Engineering

Nice To Haves

• Knowledge of high-performance memory subsystem, including SoC memory architecture, sophisticated DDR controller, PHY design and high-speed IO interface, DRAM device, and associated calibration/training mechanisms
• Experience shipping high volume DRAMs / SoCs
• Previous experience working with major DRAM memory vendors and validation of DRAM device
• Experience working in a high-energy multi-disciplined engineering environment, strong at multi-tasking, and real-time crisis management
• Excellent debugging skills
• Proven track record to drive resolution of critical problems, while under pressure
• Ability to understand complex technical discussions and extract action plans
• Passionate to own/drive project development using well-defined metrics
• Thrives in dynamic schedule driven development environment
• Ability to succinctly summarize complex details for executive reporting
• Extraordinary leadership skills and ability to inspire team members with a dedication to see the bigger picture
• Phenomenal leadership and social skills with a collaborative approach

Responsibilities

• Drive the memory subsystem readiness for custom SoCs
• Manage bring-up, validation and the complicated debug of the groundbreaking memory subsystem
• Help craft the DRAM industry’s mobile roadmap
• Drive innovative DRAM technologies to accompany SoC’s across Apple’s product lines
• Act as the critical interface between Apple’s DRAM architecture, Memory Controller Design and DV, DDR PHY, DRAM product engineering, and software teams to ensure sophisticated memory technologies are delivered from architecture to mass production to Apple’s industry leading quality standards

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees