SoC Design Verification Engineer - Emulation

Intel Corporation • Hillsboro, OR

14h • Hybrid

About The Position

Come join Intel's Devices Development Group, responsible for creating leading Client SOCs. We envision the future of computing and design for the next generation of laptop and desktop computers. We are looking for a SoC Design Verification Engineer - Emulation, ready to research, design, develop, and test Intel designs as we reimagine how to build SOCs at Intel and in the semiconductor industry. Our bold purpose as a company is to 'create world-changing technology that enriches the lives of every person on earth' and this role is instrumental in furthering our mission to shape the future of technology. Responsibilities may include but not be limited to: Building multiple emulation targets for an SoC Adding support for new features/IPs into existing emulation models Learning the architecture and microarchitecture by debugging failures to the root cause Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models System level validation tasks such as using evaluation boards and FPGAs Developing high level modeling for RTL components Developing debugging tools and software The ideal candidate should exhibit the following behavioral traits: Problem-solving skills Ability to multitask Strong written and verbal communication skills Ability to work in a dynamic and team-oriented environment

Requirements

• You must possess the below minimum qualifications to be initially considered for this position. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.
• Education: Bachelor’s degree in Computer Science, Computer Engineering or Electrical Engineering plus and 5 years of experience -OR- a Master’s Degree and 3 years of experience
• Minimum of 2 years of relevant experience in: Reading and interpreting technical specs and Register Transfer Level (RTL) code
• Building emulation models for large scale SoCs
• UNIX or Linux

Nice To Haves

• Minimum 2 years' experience with IA-32 assembly and Verilog programming experience
• Minimum 2 years' experience with validation or testing experience, especially in a silicon design team

Responsibilities

• Building multiple emulation targets for an SoC
• Adding support for new features/IPs into existing emulation models
• Learning the architecture and microarchitecture by debugging failures to the root cause
• Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
• Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
• System level validation tasks such as using evaluation boards and FPGAs
• Developing high level modeling for RTL components
• Developing debugging tools and software

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation.
• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level