Apple-posted 2 months ago
Austin, TX
5,001-10,000 employees
Computer and Electronic Product Manufacturing

Do you have a passion for invention and self-challenge? This position allows you to be a part of one of the most innovative and key projects that Apple's Silicon Engineering Group has embarked upon to date. As part of our team, you will have the opportunity to take the lead and contribute to verifying a set of sophisticated SOCs that are driving Apple's flagship Cellular 5G platform. As a member of this team you will integrate multiple sophisticated IP-level DV environments, craft highly reusable UVM TB, implement effective coverage-driven and advised test infrastructure, deploy new tools, develop and deploy AIML methodology, and implement ideas to improve the quality of tape-out readiness of all our chips. By collaborating with other product development groups across Apple, you can push the industry boundaries of what complex SOC chips can do and improve the product experience for our customers across the world! You will be able to learn all aspects of a large-scale SOC, different types of SOC architecture, many high-speed layered protocols, the industry's standard methodologies on low-power architecture, outstanding DV methodology, verification on accelerated platforms, knowledge of Cellular protocol, FW-HW interactions, complexities of multi-chip SOC debug architecture, etc.

  • Lead and contribute to verifying sophisticated SOCs for Apple's Cellular 5G platform.
  • Integrate multiple sophisticated IP-level DV environments.
  • Craft highly reusable UVM test benches.
  • Implement effective coverage-driven and advised test infrastructure.
  • Deploy new tools and develop AIML methodology.
  • Implement ideas to improve tape-out readiness of chips.
  • Collaborate with other product development groups across Apple.
  • MSEE, MSCS or beyond is preferred.
  • Experience in Computer Architecture, SOC, Networking Protocols.
  • Programming experience in SystemVerilog, Python, OOP.
  • Excellent communication and problem-solving skills.
  • Ability to thrive in a dynamic multi-functional organization.
  • Experience with low-power architecture methodologies.
  • Knowledge of Cellular protocol and FW-HW interactions.
  • Familiarity with multi-chip SOC debug architecture.
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