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Reality Labs (RL) focuses on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. As a Design Verification Manager at Meta Reality Labs, you will work with and support a world-class group of researchers and engineers, and use your digital design verification and pre/post-Silicon validation skills/knowledge to drive strategy, planning and prioritization for testing infrastructure, verification and validation of machine learning Hardware IP. You will partner with cross-functional teams to develop and optimize state of the art machine learning Hardware accelerators, Software stacks and workloads. You will work closely with ML researchers, architects and designers in creating verification strategies, methodologies, and cross-functional verification plans for multiple state of the art IPs.
