Signal Integrity Engineer
About The Position
OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI. We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees.
Requirements
- Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications
- Have a strong bias toward action, and won’t take no for an answer.
- Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level
- Have experience with PCB, connector and cable design
- Have a strong intrinsic desire to learn and fill in missing skills; and an equally strong talent for sharing that information clearly and concisely with others.
- Are comfortable with ambiguity and rapidly changing conditions.
Responsibilities
- Lead system signal integrity (SI) design for AI supercomputer product in the data center application.
- Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies
- Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity
- Perform simulation and modeling to identify and troubleshoot signal integrity issues
- Lead system interconnect design, bring up and qualification
- As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Education Level
No Education Listed
Number of Employees
5,001-10,000 employees
