Signal Integrity Engineer, Intern

MetaMenlo Park, CA
2d

About The Position

Meta is seeking a platform Signal Integrity (SI) intern to join our Infra HDRTP team. The team is responsible for designing, optimizing, and validating cutting-edge hardware platforms for Meta's rapidly expanding AI, compute, storage, and network infrastructure. As a platform SI intern, you will contribute to the design phase of NPI projects, collaborating closely with XFN team members and ODM partners. This role offers hands-on experience with state-of-the-art hardware technologies and expert mentorship from seasoned professionals within the team. Internships are twelve (12) to sixteen (16) weeks long.

Requirements

  • Currently pursuing or holding a Master's degree in Electrical Engineering, Computer Science and Engineering, or a related field
  • Demonstrated theoretical foundation and practical experience in electrical design and validation
  • Experience with computer and server system architecture
  • Proficiency in CAD software for 1)Schematic capture 2)PCB layout 3)ADS simulation

Nice To Haves

  • Theoretical and practical knowledge in high speed signal integrity design and validation, as well as electromagnetic, antenna and microwave
  • Experience with board design from schematic entry to board layout and fabrication
  • Knowledge or experience in semiconductor devices, VLSI design, microelectronic device
  • Experience with standard SI/PI tools (e.g. HFSS, CST, HyperLynx, ADS, Spice)
  • Familiarity with IEEE 802.3.dj specifications as well as the COM tool
  • Practical experience with lab tools (e.g. Spectrum Analyzer, VNA, TDR, and real-time or sampling scope)
  • Demonstrated analytical and problem-solving skills, and able to work independently

Responsibilities

  • Collaborate on the development of AI and network hardware designs and system solutions, guiding them from conceptualization to deployment.
  • Contribute to defining requirements for novel solutions and spearhead the design, development, and testing of passive and active electrical interfaces in the high-speed links (224Gbps+, PCIe Gen6+, and other interfaces).
  • High-speed modeling and simulation (pre-layout and post-layout SI analysis)
  • PCB stackup analysis and AC/DC power integrity validation
  • COM and IBIS-AMI model simulation
  • Designing, developing, and testing components, as well as creating software automation for systems and products leveraging diverse technologies
  • Work in a collaborative environment across Meta, with system suppliers and ASIC suppliers, to drive Meta's requirements for development, planning, operation, and fleet deployment
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