Server Power, Performance, and Limits Management Software & Firmware Architect

Qualcomm • Santa Clara, CA

27d

About The Position

Our Mission
We are transforming the compute industry by reimagining silicon and delivering cloud-scale, production-ready ARM server platforms. By joining our team, you’ll collaborate with world-class engineers to build solutions that prioritize performance determinism, energy efficiency, and operational simplicity at hyperscale.
Our charter is to deliver reference platforms based on Qualcomm’s server-class SoCs, including silicon enablement, firmware, OS integrations, documentation, and ecosystem support—designed to meet the expectations of large-scale datacenter operators.
Job Summary
Qualcomm is seeking an experienced ARM Server Power, Performance, and Limits Management Software & Firmware Architect to define the end-to-end architecture for power, performance, and limits management across our next-generation ARM server platforms powered by Qualcomm Oryon CPUs.
This role is critical to enabling predictable performance, efficient power utilization, and policy-driven control in hyperscale datacenter environments. You will architect solutions spanning silicon capabilities, firmware (TF-A, UEFI, BMC), OS and hypervisor layers, ensuring clean contracts, robust telemetry, and scalable control mechanisms.
As a technical leader, you will work across CPU, SoC, firmware, OS, and platform teams to deliver standards-compliant, production-hardened solutions that integrate cleanly into customer fleet management and orchestration workflows.

Requirements

• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Software Engineering or related work experience.
• OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Software Engineering or related work experience.
• OR PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience.
• 4+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

Nice To Haves

• 10+ years of experience in system software and/or firmware architecture for server or data center platforms.
• Strong expertise in ARM64 server architectures, operating systems, and hypervisors.
• Deep understanding of CPU power and performance management, including DVFS, idle states, power domains, and limits enforcement.
• Hands-on experience with Linux kernel internals, ACPI, firmware–OS interfaces, and performance tuning at scale.
• Familiarity with data center subsystems such as DDR, PCIe, and platform telemetry pipelines.
• Proven ability to work across hardware, firmware, and OS teams in complex, multi-stakeholder environments.
• Strong debugging and performance analysis skills using system-level and in-lab tools.
• Excellent written and verbal communication skills, with experience presenting to senior technical audiences and customers.
• Master’s degree in Computer Science, Electrical Engineering, or a related field.
• 15+ years of experience delivering commercially deployed server or hyperscale compute platforms.
• In-depth knowledge of ARM power management and system software specifications (PSCI, CPPC, ACPI, SBSA/SBMR, SystemReady).
• Experience architecting power capping, thermal control, and performance isolation solutions in large-scale data center environments.
• Familiarity with hyperscaler operational models, including fleet management, observability, and policy-based control.
• Demonstrated success driving cross-layer architectures that balance silicon capabilities with software flexibility.
• Experience collaborating with ARM, OCP, or related industry forums.

Responsibilities

• Architect cloud-scale power, performance, and limits management frameworks for ARM-based server platforms, spanning silicon, firmware, OS, and BMC layers.
• Define system behavior for CPU performance scaling, power capping, thermal management, and platform-level limits enforcement, with a focus on determinism and repeatability.
• Demonstrate expertise in limits management for complex SoCs, leveraging firmware-based PID control loops to balance performance, power, and thermal objectives across diverse operating conditions.
• Establish clear hardware–firmware–OS contracts using industry standards (ACPI, PSCI, CPPC, SBSA/SBMR) to ensure long-term maintainability and customer extensibility.
• Drive integration of telemetry, control loops, and policy interfaces suitable for fleet-level observability and automation.
• Collaborate closely with CPU, SoC, firmware, HLOS, hypervisor, and performance teams to ensure consistent platform behavior across workloads and configurations.
• Partner with customers to understand hyperscaler requirements for performance characterization, power efficiency, and operational control, and guide adoption of Qualcomm reference solutions.
• Influence platform roadmaps by translating customer and ecosystem feedback into actionable architectural requirements.
• Ensure alignment with ARM and industry ecosystems and proactively incorporate evolving standards and best practices; participate in and guide discussions in various industry forums.
• Produce high-quality architecture specifications, design documents, and customer-facing technical materials.
• Provide technical leadership across multiple teams, driving architectural coherence without direct ownership.

Benefits

• We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees