Sensor Engineer

Qualcomm • Santa Clara, CA

1d

About The Position

Sensors-based hardware technology has a wide range of applications including navigation, gaming, smart user interface, multimedia, virtual reality and augmented reality. This challenging position offers the opportunity to work with leading edge sensor technologies embedded in smartphones, automotive, IOT, smartwatches as well as other consumer electronics devices. Job activities span the ASIC design process from specification definition, high-level design, coding and verification, RTL generation, and delivering a timing-closed netlist for layout. The successful candidate will work with architects of Systems, as well as other SoC team ASIC designers and software engineers to micro-architect and implement designs specific to Digital Sensor subsystems for integration into SoC for mobile applications.

Requirements

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• OR
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• OR
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Nice To Haves

• Experienced with ASIC RTL Synthesis, LEC, Power Extraction tools (PTPX), Primetime, RTL Linting tools and extensive usage of simulation tools.
• Experience with ASIC ECO flow, RTL sanity tools specific to Design Rule Checking and Clock Domain Crossing checks is a plus
• Experience with C++/SystemC is a plus
• Experience with High Level Synthesis is a plus
• Familiarity with MBIST and DFT flow
• Gate level Simulation debug and usage of power extraction tools
• Strong analytical skills and ability to work in a dynamic and fast paced team environment
• Excellent written and verbal skills
• Strong interpersonal skills and a good team player

Responsibilities

• Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.
• Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
• Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs.
• Evaluates all aspects of complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.
• • Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages.
• • Writes and reviews detailed technical documentation for complex EDA/IP/ASIC projects.
• Architecting, designing and implementing digital sensor hardware for ASIC SoC
• Debugging, verifying, optimizing, and bit-exact matching with test vectors
• ASIC synthesis, static timing analysis and other post-RTL tools needed for delivering timing-closed designs for layout
• Power estimation and low-power design implementation
• Collaborating with Software Engineering and Systems Engineering Teams
• Adherence to Qualcomm’s processes for RTL and netlist releases
• Python automation, as well as enabling new methodologies, for improving workflows and team efficiency
• Participate in all project reviews
• Documentation

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees