Senior VLSI Physical Design Integration Engineer

NVIDIA • Westford, MA

96d • $136,000 - $264,500

About The Position

NVIDIA is seeking an outstanding Senior VLSI Physical Design Integration Engineer who is dedicated to collaborating closely with our teams in the USA, Israel, and India. As a valued member of our team, you will contribute to the development of our networking product line, from concept to tapeout. If you are hardworking and thrive on challenges, join us and make a significant impact!

Requirements

• BSEE / MSEE or equivalent experience.
• Minimum 5+ years of experience in VLSI physical design implementation on 16nm, 7nm, 5nm or 3nm technology.
• Able to assist in design flow development and debugging.
• Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR/ICV), Cadence (Genus/Innovus/Tempus) and other major EDA companies.
• Strong analytical and debugging skills.
• Proficiency using Python, Perl, Tcl, Make scripting is desired.

Nice To Haves

• Creative and autonomous mindset.
• Great teammate.

Responsibilities

• Run integration flows to build RTL, run connectivity checks, and assemble logical units.
• Perform linting checks and debug RTL and netlist-level issues.
• Collaborate with front-end teams to resolve connectivity issues and implement design fixes to ensure physically-viable RTL netlists are delivered to downstream physical design flows.
• Project level cell library management to ensure compatibility between all workflows.
• Run synthesis workflows and optimize for area, power, and timing.
• Run physical design flow from netlist to GDS, perform STA, physical verification (LVS/DRC).
• Perform netlist checks and formal equivalence validation.
• Enhance tool automation, streamline workflows, and document best practices.

Benefits

• Equity and benefits.

What This Job Offers

• Career Level: Senior
• Education Level: Master's degree
• Number of Employees: 5,001-10,000 employees