Senior Validation Engineer

Microsoft•Redmond, WA

12h

About The Position

The Artificial Intelligence Silicon Engineering team is seeking passionate, driven, and intellectually curious computer/electrical engineers to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner. We are looking for a Senior Validation Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISOC) Silicon team. You will be part of the Post-Silicon Validation team, driving many facets of high performance, high bandwidth designs. Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Nice To Haves

7+ years of experience in pre-silicon and post-silicon validation with a proven track record of delivering high performance Central Processing Unit (CPU), Vector processors and Graphics Processing Unit (GPU’s) or relevant experience.
Experience driving and developing tools for pre and post-silicon validation. Developed automation flows
Experience with Scan / JTAG based debugging methodologies, tools for board management, exposure and knowledge of embedded processor debuggers.
Proven software skills. Programming skills in C/C++, System Verilog, Assembly, Python and knowledge of advanced computer architecture and boot flow. Knowledge of FTDI / openOCD
Hands on experience with validation for multiple product cycles from definition to Silicon, including writing test plans, developing tests and debugging failures
Experience with high speed IOs and industry standard bus/parallel/serial protocols like Ethernet, PCIE, JTAG, AXI. AHB and I2
Communication skills, team player, self-driven and problem solving ability

Responsibilities

Lead key components of tooling and infrastructure for validation of complex SOCs
Define, develop and deploy tools and methodologies for volume test execution and efficient silicon debug
Ensure robust infrastructure in place for Pre-Silicon SoC verification, Post-Silicon/FPGA validation
Work with Cross functional teams, Architecture, Design, Verification, Partner teams for project execution and also define validation tools/methodologies for next generation designs
Running tests, debugging failures, creating stress and performance scenarios to meet test plan goals
Actively participate in chip bring up and write test firmware to support various teams
Coach and mentor others in your areas of expertise
Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

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