Senior Systems Prototyping Engineer

NVIDIA • Santa Clara, CA

149d • $168,000 - $310,500

About The Position

We are looking for hardworking systems engineers who will craft FPGA prototypes of our next generation GPUs, SOCs, NICs, Switches on standard FPGA prototyping platforms. We are now looking for a Senior Systems Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA.

Requirements

• BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields with 7+ years of experience, or MS with 5+ years of proven experience in FPGA prototyping.
• Good understanding of FPGA prototyping architecture, devices, flows and tools.
• Experience in backend flows of FPGA Prototyping - Synthesis, P&R and Timing closure, with emphasis on Synopsys Protocompiler or Synplify Premier and Xilinx Vivado.
• Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB).
• Knowledge of Verilog, System Verilog and digital design concepts.
• Understand the industry standard protocols like PCIe, CXL, NVLINK, USB, CHI and CPU-GPU Coherency.
• Good debugging and problem-solving skills.
• Hands on experience with lab FPGA debug methodologies, tools (Identify or ChipScope), and lab debug equipment (oscilloscopes, logic analyzers).

Nice To Haves

• Scripting knowledge (Perl/shell/Tcl) is desired.
• Good documentation, communication and interpersonal skills.
• Experience with memory bring up of Memory (LPDDR5/6, DDR5/6), CXL/PCIE and/or high speed I/F such as USB4/3 is desirable.
• Prior experience with hardware emulation or prototyping (Synopsys HAPS, Zebu, Mentor Veloce) of a high-performance processor or SOC is a plus.

Responsibilities

• Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route.
• Improve performance of the prototype, analyze timing and generate bit streams.
• Bring up the design on FPGA prototyping platforms and indulge in problem solving.
• Release the prototype to the customers and support them when they face problems.
• Understand the design and implementation, define the configurations, develop/modify the bringup and testing infrastructure and verify the correctness of the design.
• Understand the system topologies with multiple ASICs to realize the DGX systems on prototyping platforms and emulators.
• Coordinate with architects, designers, verification engineers, and SW teams to accomplish tasks.

Benefits

• Base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.
• Eligible for equity and benefits.

What This Job Offers

• Career Level: Senior
• Education Level: Bachelor's degree
• Number of Employees: 5,001-10,000 employees