Arista Networks-posted 4 months ago
$130,000 - $192,000/Yr
Mid Level
Santa Clara, CA
1,001-5,000 employees

Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges. At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation. Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do.

  • Debugging production system problems and delivering solutions.
  • Deep dive into various aspects of any existing hardware design - CPU/ASIC, power, SI, clocking, PCIE, optics, fab, components.
  • Work closely with software and customer teams on high pressure escalations from the field.
  • Reading logs, identifying bugs, determining the best fix with minimal interruption to the field.
  • Delivering the final solution and determining if any other systems are susceptible.
  • Implementing measures to prevent issues from occurring again.
  • Writing scripts to look for specific information in logs or to capture information in live debug sessions.
  • Making firmware, schematic, BOM, fab changes as needed.
  • Conducting lab measurements and debug.
  • Working closely with component, FA, ODM teams to identify component level or third party RCAs and fixes needed.
  • Identifying test escapes and working with the design validation team to examine current test limitations and develop new tests.
  • Writing and presenting root cause analysis for executives and customers.
  • BSEE or MSEE.
  • 5+ years of relevant experience in hardware engineering.
  • Experience debugging Networking Hardware.
  • Experience with proper design of 20+ layer count boards featuring 50G+ signals.
  • Experience debugging and validating multi-phase DC/DC’s for high current, high transient loads.
  • Experience with design and debug of high speed interfaces (DDR, PCIe) as well as low speed signals (I2C, SPI).
  • Familiarity with signal integrity and power integrity concepts and tools, such as: impedance, PDN’s, Bode plots, PCIE analyzers, TDR’s, VNA’s.
  • FPGA design using Verilog.
  • Medical, dental, vision, wellbeing, tax savings and income protection.
  • Discretionary Arista bonuses and equity.
  • Sales Incentive Plan for eligible sales roles.
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