Senior Staff, Serdes DSP Design

Samsung Semiconductor-posted 2 months ago
$180,950 - $289,050/Yr
Senior
San Jose, CA
5,001-10,000 employees
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Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. Samsung Semiconductor Inc. (SSI) is advancing the world’s technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams.

  • Focus on digital DSP design for high speed Serdes.
  • Collaborate with system and analog teams.
  • Utilize a thorough understanding of the end-to-end digital design flow.
  • Bachelors with 15+ years of relevant industry experience, or Masters with 13+ years or PhDs with 10+ years of experience in high speed Serdes DSP design.
  • Proficient with Verilog-HDL/System Verilog coding for PAM4/PAM6 DSP based SerDes including link-training, analog circuits and ADC foreground/background calibration and adaptation.
  • Deep understanding of high-speed serial interconnect architectures such as PCIe, 100/200Gbps per lane ethernet and design trade-offs.
  • Experience in RTL logic design, debug and functional verification.
  • Experience in synthesis, CDC, static timing analysis.
  • Understanding impacts of analog and mixed-signal design and verification on digital-on-top development flow.
  • Deep understanding of Signal Integrity and Power Integrity modeling for High Speed designs.
  • Understanding of micro architecture with standard peripherals such as AMBA BUS, I2C, SPI and UART.
  • Understanding of design for testability (DFT) flow.
  • Strong background in DSP and algorithms.
  • Familiar with the PMA/PMD/PCS layers of the Ethernet protocol.
  • Understanding of fundamental physical design flows and stages.
  • Firmware development of embedded microcontroller systems.
  • Medical/Dental/Vision/401k.
  • Charitable giving match.
  • 4+ weeks of paid time off a year, plus holidays and sick leave.
  • Stipend for fertility care or adoption, medical travel support, and an errand service.
  • On-demand apps and paid therapy sessions.
  • Onsite Café and gym, plus virtual classes.
  • Flexible work environment.
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