Rocket Lot - Senior Staff Engineer Verification & Validation

Infineon•San Jose, CA

About The Position

As a Senior Staff Engineer Verification & Validation on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.

Requirements

Minimum a Bachelor’s Degree (or foreign equivalent) in electrical engineering and Electronic Engineering or a related field
6-8 years of experience with Working knowledge of gate level simulation and power aware sims.
Proficient in object oriented programming and development of re-usable test-bench.
Experience in working with verification IP’s
Experience with implementing constraint random verification methodology.
Good problem solving skills and working effectively with both internal and external teams/customers.
Experience with silicon debug which include logic and custom Analog Blocks working together
Understanding of performance and latency verification and be self-motivated with the initiative to seek constant improvements in the verification methodologies
Proven track record of taking IPs from product definition to production. Experience in complex IP verification. Good understanding of IP design and verification methodologies and flows. Solid understanding of standard IP verification techniques.

Responsibilities

Participating in architecture definition and modeling.
Contributing to micro-architecture definition and reviews.
Reviewing standard specs and incorporating any changes into the verification plan to ensure compliance.
Defining verification strategy (constraint random, Formal, Directed etc.) for IP/Chip/System level verification.
Defining and implementing verification environment architecture and methodology development.
Driving block/chip/system level test plan development and execution.
Working with ASIC designers and architects to produce thoroughly verified, robust IP
Overseeing all verification for the IP/Chip/System and driving functional and code coverage closure.
Actively participating in post-silicon bring-up, validation and compliance testing.
Actively participating in cross functional collaboration with design, software and hardware teams to ensure a successful product delivery.
Mentor other engineers and technically guide them.