We are seeking an experienced Analog /RF IC designer to architect, implement and productise the multi‑lane, multi‑standard SerDes (serialiser / deserialiser) interfaces that move data in and out of the OTPU at tens of gigabits per second per lane. You will own both transmit and receive paths—equalisers, CDRs, drivers, samplers and clocking assist blocks—while ensuring robust operation over challenging channels and across multiple aggregated lanes. Your designs will be central to realising Flux’s multi‑terabit‑per-second optical fabric.