Senior SoC Performance Architect

QualcommSanta Clara, CA
1d

About The Position

Qualcomm Data Center team is developing High performance, Energy efficient server solution for data center applications. We are looking for highly talented, innovative, teamwork-oriented individuals for our cutting-edge technology work! As a SoC Performance Architect, you will create performance and power models for the fabric NoC / DRAM controller / IO blocks for server-class SoCs, correlate models against RTL behavior, prototype ideas and help productize performance/power features for future SoC designs.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Science, or related field and 8+ years of Systems Engineering or related work experience.
  • OR Master's degree in Electrical Engineering, Computer Science, or related field and 7+ years of Systems Engineering or related work experience.
  • OR PhD in Electrical Engineering, Computer Science, or related field and 6+ years of Systems Engineering or related work experience.
  • 2+ years of experience in one or more system architecture technology areas and products (e.g., Power System, Shared Resource Management, Limits/Thermal Management, Hardware Islands).
  • MS in Computer Science/Computer Engineering/Electrical Engineer with 3 years of experience in SoC performance/power modeling
  • Strong grasp of the computer architecture fundamentals especially in the areas of interconnects, traffic QoS, distributed caches, coherency flows, DRAM controller and IO (PCIe) flows
  • Proficient in C++ and Perl / Python
  • Exposure to performance analysis and debug
  • Ability to independently identify, troubleshoot and solve performance problems

Nice To Haves

  • MS in Computer Science/Computer Engineering/Electrical Engineer with 6 years of experience in CPU / SoC performance/power modeling, analysis / debug
  • Expertise in one or more of these functional areas: Coherent fabrics based on the AMBA CHI / AXI protocol Memory controller designs for LPDDR5, DDR5 IO controllers and fabric bridges for PCIe / CXL / CCIX
  • Strong background in building fast, accurate SoC / CPU performance models C++
  • Exposure to testing and debugging performance issues in pre- and post-silicon environments
  • Demonstrable experience in productizing features that improve performance/power characteristics of a design

Responsibilities

  • Develop a SoC performance/power model for blocks such as interconnect NoCs, distributed system caches, memory controllers, IO controllers
  • Verify model correctness by writing unit-tests and debugging mismatches against expectations
  • Identify ideas for improving the SoC’s performance/power characteristics. Prototype the idea in the performance/power model and thoroughly characterize it
  • Work with architects and RTL developers to productize the improvements identified through detailed studies
  • Conduct RTL performance verification. This will involve creation of verification plans and directed tests / checkers

Benefits

  • We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.

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What This Job Offers

Job Type

Full-time

Career Level

Senior

Number of Employees

5,001-10,000 employees

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