Senior Silicon Design Engineer

Microsoft • Redmond, WA

7h

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for a Senior Silicon Design Engineer to help achieve that mission.
The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more.
As Microsoft's cloud business continues to grow, the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the SCIPS (Semi-custom and Central IP Silicon) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for a Senior Silicon Design Engineer with a passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Senior Silicon Design Engineer to join the team.

Requirements

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
• This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Nice To Haves

• 6+ years of hardware design experience.
• Experience in Digital Design including microarchitecture specification development and RTL coding.
• Experience in Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), and LINT closure.
• Experience in developing/optimizing high speed CMOS designs and evaluating PPA tradeoffs.
• Proficiency in Verilog, System Verilog, and scripting languages such as Python or Perl.
• Good design knowledge of the industry standard bus interfaces such as AMBA AXI protocol.
• Experience in basic floor planning, static timing analysis/closure and engaging with physical design teams
• Experience with driving chip design quality through design and checklist reviews
• Good communication and a self-motivated individual that can collaborate across teams within Microsoft
• Worked in leading-edge technologies: 5 nm or newer

Responsibilities

• Own end‑to‑end design responsibilities, from architectural collaboration through silicon validation
• Collaborate with SOC and IP architecture teams to define and refine IP microarchitecture
• Develop microarchitecture and implement high‑quality RTL for IP blocks
• Drive synthesis, static timing analysis (STA), and timing closure
• Support silicon bring‑up and validation activities
• Leverage high‑speed microarchitecture design experience to deliver robust, high‑performance solutions

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level