Senior Silicon Design Engineer

Advanced Micro Devices, Inc•San Jose, CA

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. We are seeking a highly motivated and experienced Senior Silicon Design Engineer to join our AECG SIT team. This role involves leading and contributing to the design, integration, and characterization of advanced silicon testchips for FPGA products across cutting-edge process nodes. You are an expert in IC design and manufacturing including analog/digital IP integration, chip design, silicon process or packaging technologies. A good understanding of device physics, reliability and silicon chip manufacturing is essential. The candidate must also demonstrate effective communication, good interpersonal skills, along with a strong interest in emerging technologies and innovation.

Requirements

Good understanding of circuit design, semiconductor device physics, and device reliability.
Experience in designing and validating circuits across advanced technology nodes, including FinFET and Gate-All-Around (GAA).
Familiar with digital and custom design and verification flows. Proficient with major EDA tools for RTL coding, circuit simulation, timing closure, parasitic extraction, and physical verification.
Experience writing comprehensive testbenches and generating test patterns for post‑silicon validation.
Strong problem‑solving skills with hands-on experience in silicon bring-up and the use of lab bench test equipment.
Proficient in C/C++ and Python for programming and scripting.
Preferably holds an advanced degree (PhD or MS) in electrical & electronics engineering or physical sciences; alternatively, a bachelor’s degree with 5+ years of relevant industry experience is acceptable.

Nice To Haves

Familiarity with 2.5D and 3D stacked silicon and advanced packaging technologies is a plus.
Experience with PCB/package design and signal/power integrity (SI/PI) analysis is a plus.

Responsibilities

Facilitate the design and integration of digital and analog IPs within the testchip architecture.
Develop verification plans and create testbenches to validate chip functionality.
Generate test patterns to support post‑silicon validation.
Assist with silicon bring-up, debugging, and lab‑based validation activities.
Collaborate cross‑functionally with layout designers, IC design teams, foundry partners, CAD engineers, and test teams to ensure smooth integration and execution across all development phases.