Intel-posted 8 days ago
Full-time • Mid Level
Onsite • Austin, TX
5,001-10,000 employees

Intel Central Engineering Group is engaged with customers today starting with our existing foundry offerings. We are expanding at a torrid pace to include our most advanced technologies, which are ideal for high-performance applications, and they are completely dedicated to the success of its customers with full profit and loss responsibilities. Our Focus us to ensure the successful integration and adoption of Intel technologies by its original equipment manufacturers (OEMs), original design manufacturers (ODMs), and Design partners. This team serves as a critical technical interface, acting as the "voice of the customer" within Intel to drive product improvements and resolve issues throughout the entire product lifecycle. The Senior Silicon Design Engineer will be responsible for, but not limited to: Performing physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff, including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. Optimizes design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.

  • Performing physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
  • Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
  • Conducts verification and signoff, including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
  • Analyzes results and makes recommendations to fix violations for current and future product architecture.
  • Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
  • Optimizes design to improve product level parameters such as power, frequency, and area.
  • Participates in the development and improvement of physical design methodologies and flow automation.
  • Bachelor's degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study.
  • 5+ years of experience with complex ASIC/SOC Implementation.
  • Experience in system and processor architecture.
  • Experience designing and implementing complex blocks like CPUs, GPU, Media blocks, and Memory controller.
  • Experience with System Verilog/SOC development environment.
  • Experience in scripting languages (i.e. PERL, TCL, or Python).
  • Experience with Hardware validation techniques (i.e. formal Verification, Test and Function Verification).
  • Post graduate degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study.
  • Experience with Industry standard protocols (i.e. PCIE, USB, DRR, etc).
  • Experience with interaction of computer hardware with software.
  • Experience with Low power/UPF implementation/verification techniques.
  • Experience with Formal verification techniques.
  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.
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