About The Position

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! This role is part of TeraWave, a satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This network will service tens of thousands of enterprise, data center, and government users who require reliable connectivity for critical operations. We are seeking a Senior Silicon Design Engineer specializing in Packaging and Co-Design for our revolutionary TeraWave satellite communications network. This role will be instrumental in developing advanced silicon solutions that enable our constellation to deliver symmetrical data speeds of up to 6 Tbps globally. The ideal candidate brings expertise in advanced packaging technologies, system-in-package design, and silicon co-design methodologies, thriving in a fast-paced environment where innovation meets mission-critical execution.

Requirements

  • B.S. degree in Electrical Engineering, Computer Engineering, or related field
  • 8+ years of experience in silicon design with focus on advanced packaging technologies
  • Demonstrated expertise in system-in-package design and heterogeneous integration
  • Experience with 2.5D/3D packaging technologies including interposers and chiplets
  • Knowledge of high-speed signaling in advanced packages
  • Experience with thermal and mechanical co-design for complex silicon solutions
  • Understanding of radiation effects on semiconductor devices and packaging materials
  • Proficiency with industry-standard EDA tools for package design and simulation

Nice To Haves

  • M.S. or Ph.D. in Electrical Engineering with focus on semiconductor packaging
  • Experience with space-grade packaging technologies and qualification processes
  • Knowledge of RF/microwave packaging techniques for high-frequency applications
  • Experience with power delivery network design for complex multi-die packages
  • Background in designing for harsh environments including thermal cycling and radiation
  • Experience with silicon photonics integration and optical I/O technologies
  • Understanding of advanced cooling solutions for high-performance computing in space
  • Familiarity with reliability physics and failure mechanisms in advanced packages

Responsibilities

  • Define and architect custom silicon solutions including DSPs, SDR components, beamforming processors, and network processing units optimized for advanced packaging technologies
  • Lead technical architecture decisions and requirements definition for space-optimized processing solutions with focus on heterogeneous integration
  • Drive 2.5D and 3D packaging strategies including silicon interposers, chiplets, and advanced substrate technologies
  • Lead end-to-end ASIC/FPGA development from requirements through RTL design, verification, synthesis, physical design, and post-silicon validation
  • Develop co-design methodologies integrating electrical, thermal, and mechanical considerations for complex multi-die packages
  • Manage design flows and coordinate with foundry and packaging partners to ensure manufacturability
  • Implement and verify radiation tolerance techniques including SEU mitigation, TMR, ECC, and RHBD methodologies
  • Coordinate radiation testing and qualification campaigns to ensure space survivability
  • Drive design standards, verification strategies, IP library development, and documentation for advanced packaging
  • Establish design flows and best practices for space-grade silicon engineering across the program
  • Collaborate cross-functionally with systems engineers, RF engineers, avionics teams, thermal engineers, and software developers
  • Support requirements flow-down and interface definitions between chiplets and package components
  • Lead technical risk assessment and Failure Investigation Teams (FITs) for silicon design issues, radiation-induced failures, and flight anomalies
  • Develop mitigation strategies and corrective actions for packaging-related challenges
  • Provide recommendations for capital investments in EDA tools, verification platforms, emulation systems, and validation equipment

Benefits

  • Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
  • Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
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