Picture yourself developing advanced electronic systems deployed to protect members of our armed services on some of the nation's most sophisticated aircraft. Pretty rewarding, right? And now imagine doing that job while working in a fast-paced environment using state-of-the-art tools and methodologies, all the while increasing your knowledge, growing your skills, and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification environments. Candidates will be given the opportunity to lead teams, mentor junior engineers, and contribute to the evolution of the company's verification processes and methodologies. While in this job you will Plan, architect, develop, and use configurable, self-checking testbenches implemented in SystemVerilog/UVM and/or VHDL; Develop constrained-random, metric-driven test plans and strategies to verify FPGAs performing signal processing and control functions in Electronic Warfare systems; Collect and analyze coverage metrics, then use that information to improve the effectiveness of testcases; Enhance your leadership skills while leading small to medium sized DV teams Create reusable Verification IP to be shared across the organization; Drive changes to our process and methodologies. Enhance your DV skills as well as your knowledge of Electronic Warfare while working with subject matter experts; Mentor junior engineers across multiple U.S. locations BAE Systems offers competitive pay, benefits, and important work-life balance initiatives including every other Friday Off, Flextime, and Telecommuting. BAE also believes in a culture of recognition for the extraordinary contributions of our skilled employees. Because of the need for consistent, in-person collaboration and/or the requirement to perform all work onsite due to the nature of this particular role, it will be performed full-time on site. Please note that pursuant to a government contract, along with the ability to obtain a minimum of Secret Clearance #ESFPGA #IJS