Senior Power Systems Engineer

HP IQSan Francisco, CA
3h

About The Position

HP IQ is seeking a Senior Power Systems Engineer to drive end to end system architecture, modeling, and optimization for wearable platforms. The candidate will build power models, define system use cases and operating modes, partner with product and engineering teams to meet aggressive power targets, and define manufacturing tests and field telemetry for NPI. The ideal candidate brings strong systems thinking, hands-on experience with low power architectures, and the ability to build models and telemetry to drive tradeoffs from SOC level to board level to maximize user runtime.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or related technical field.
  • 8+ years of experience in power systems, systems engineering, or related domains.
  • Experience optimizing multi-core SoCs, understanding of power systems at the platform or system level.
  • Experience building and correlating power models to instrumented tests.
  • Ability to communicate technical concepts clearly and collaborate across engineering teams.

Nice To Haves

  • Experience with ARM-based embedded systems and profilers, including power supplies and power management ICs.
  • Experience with power and performance characterization, validation, and correlation to real system behavior using bench equipment and scripts in python or matlab.
  • Prior experience in computing platforms, servers, workstations, or embedded systems.
  • Demonstrated ability to influence system design decisions using data and analysis.
  • Experience working in a power-focused systems or architecture team.

Responsibilities

  • Power architecture responsibility for a wearable device covering SoC states, sensor, audio, and memory architecture tradeoffs at board level.
  • Battery, PCM, and charging profile definition and validation
  • Design power experiments, test plans, and measurement & telemetry mechanisms across firmware and hardware to optimize power and performance.
  • Build and maintain system-level power models to model expected power consumption for user profiles. Map power models by subsystem, correlating modeled behavior with instrumented measurements.
  • Define user profiles, power and sleep states, and low-power operating modes
  • Partner closely with product, hardware, firmware, manufacturing, and regression QA to drive alignment and execution toward power targets.

Benefits

  • Health insurance
  • Dental insurance
  • Vision insurance
  • Long term/short term disability insurance
  • Employee assistance program
  • Flexible spending account
  • Life insurance
  • Generous time off policies, including;
  • 4-12 weeks fully paid parental leave based on tenure
  • 11 paid holidays
  • Additional flexible paid vacation and sick leave (US benefits overview)
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