Senior PIC Design Engineer

Marvell Technology • Santa Clara, CA

1d

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips. In the era of Accelerated Computing, data center bottlenecks are no longer limited to compute performance, but rather the system’s interconnect bandwidth, memory bandwidth, and memory capacity. Celestial AI’s Photonic Fabric™ is the next-generation interconnect technology that delivers a tenfold increase in performance and energy efficiency compared to competing solutions. What You Can Expect In this role, you will be a key part of the team responsible for the design and layout of very large-scale Silicon Photonic ICs (PICs) that interface directly with co-designed ASICs from advanced technology nodes at TSMC.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and at least 1-3 years of related professional experience OR Master’s degree / PhD in Computer Science, Electrical Engineering or related fields with no professional experience.
• Good grasp of fundamental photonics concepts and engineering design principles
• Experience with Silicon Photonics Process Design Kits and related best practices in the layout of photonic devices, sub-systems and full PICs.
• Experience with physical design packages (Cadence, Siemens Mentor, Klayout or similar), including layout automation within these tools using SKILL, Python or similar.
• Experience with layout verification tools for DRC, ERC and LVS (Calibre, Pegasus or similar).
• Self-starter
• Creativity in problem-solving with strong attention to detail
• Thrives in a highly collaborative and dynamic work environment
• Excellent oral and written communication skills

Nice To Haves

• PhD in engineering or physics with concentration/experience in integrated photonics preferred.
• Familiarity with SI and PI-aware electrical routing for analog and digital blocks is a strong plus.

Responsibilities

• Contribute to the design and layout of very large-scale Silicon Photonic ICs (PICs) that interface directly with co-designed ASICs.
• Contribute to PIC delivery, all the way from floor-planning and top-level block placement to micro-architecture, optical & electrical routing, and back-end DRC and LVS verification.
• Work in conjunction with broader analog, digital and packaging teams to drive PIC physical design in accordance with product requirements related to opto-electronic performance, signal integrity (SI) & power integrity (PI).
• Work closely with the rest of the Photonics team to optimize layout flows and add to existing software base for automated design and verification.

Benefits

• Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
• Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
• Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
• We look forward to sharing more with you during the interview process.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level