Senior Physical Design Engineer

ACL DigitalSanta Clara, CA
276d

About The Position

Responsible for doing all aspects of SOC Physical Design implementation. For this position, the candidate will be representing Synopsys under our Design Services organization working on physical design implementation for SOC programs our customers have contracted to Synopsys. Some programs can be working with Synopsys team members and others can be customer augmentation with well-defined responsibilities. The ideal candidates should be highly proficient in using all the Synopsys EDA tools/flows with little to no ramp-up time needed to make an immediate impact.

Requirements

  • Proficient in Synopsys Fusion Compiler/ICC2 (Synthesis, DFT insertion, Place & Route, Chip Finishing, PT-SI STA, Timing Closure, PV (DRC/ERC/PERC/LVS/).
  • Experience with Synopsys DC, DCG, DC TOPO.
  • Familiarity with Synopsys Flow Development & SOC implementation methodologies.
  • Experience with RTL Hand-over for RTL to GDS.
  • Experience in top-level floorplanning, bump-maps, RDL IO Pad/Ring creation/verification, power grid creation/verification, hierarchal floorplanning/partitioning.
  • Solid experience with full SOC clocking methodologies (H-Tree, Structure Clocking, MS CTS for Top/Blocks).
  • Proficient with SDC STA constraints development driving back-end tools for blocks and full-chip through timing closure & sign-off.
  • Ability to define sign-off requirements/margins based on Foundry technology requirements.
  • DFT experience with compression, scan, TDF, and MEMBIST.
  • Experience with Synopsys Formality for formal verification (RTL to Gate, Gate-to-Gate) & Formality ECO flows.
  • Familiarity with UPF flows & methodologies for multi-voltage power domains.
  • Experience with Synopsys ICV for PV (Physical Verification - DRC/ERC/LVS/PERC).
  • Experience with Ansys Redhawk SC for IR analysis.
  • Experience in PD implementation/design closure on complex IP Sub-Systems such as PCIe, USB, MIPI, DDR, & HBM.
  • Experience with GlobalFoundries, TSMC, & Samsung technology nodes.
  • Solid track record on execution delivering to high-quality standards.

Nice To Haves

  • Familiar with Synopsys Lynx.
  • Experience with defining sign-off requirements/margins based on Foundry technology requirements.

Responsibilities

  • Perform all aspects of SOC Physical Design implementation.
  • Represent Synopsys under the Design Services organization.
  • Work on physical design implementation for SOC programs contracted to Synopsys.
  • Collaborate with Synopsys team members and customers for well-defined responsibilities.
  • Utilize Synopsys EDA tools/flows effectively with minimal ramp-up time.
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