TSMC-posted 4 months ago
$108,000 - $167,500/Yr
Full-time • Senior
San Jose, CA
5,001-10,000 employees

As a Senior Physical Design Engineer, you will be responsible for the physical design implementation PnR run, Performance/Power/Area (PPA) comparison, congestion & DRC analysis, and design optimization. You may also do synthesis, debugging & data analysis, scripting, STA or timing analysis. You will be reporting to Manager of Advanced Chip implementation team at its San Jose Design Center, California and joining a team of engineers dedicated to pushing the envelope for the world’s leading semiconductor company. We are currently operating in a hybrid work schedule with 4 days in office.

  • Responsible for the physical implementation on TSMC’s most advanced process nodes.
  • Netlist-to-GDS flow including block/soc-level placement, clock tree synthesis, routing, and design optimization.
  • Evaluate flow and methodologies to optimize power, performance, and area (PPA).
  • Analyze standard cell library utilization and route congestion data.
  • CAD development including customizing design flows and creating comparison tables using scripting language such as TCL, Python, Perl and Shell.
  • Master’s degree in Electrical Engineering or Computer Science with a minimum of 4 years of relevant industry experience.
  • In depth knowledge of hardware design courses including VLSI design, digital integrated circuits, logic design, design for testing, computer architecture, and digital design automation.
  • Knowledge on physical design implementation flows, auto placement and routing (APR), static timing analysis (STA), layout design, physical design verification (PDV), IREM signoff, and CAD development.
  • Experiences in research projects or internship related to RTL coding, synthesis, digital design and testing, physical implementation or design verification.
  • In depth knowledge of major EDA tools/design flows.
  • Experience in Python/Perl/TCL language programming and CSH script.
  • Ability to work regularly at a customer site in the South Bay area.
  • Able to independently complete Netlist-GDS P&R.
  • Excellent communication skills and strong problem-solving skills.
  • Positive, Active, Collaborative, Self-motivated, Adaptable and Flexible.
  • TSMC N16 and below technology.
  • Experience in software programming is a plus.
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