Senior PCB Layout Engineer

E-Space•Saratoga, CA

1d•$150,000 - $200,000•Onsite

About The Position

Ready to make connectivity from space universally accessible, secure and actionable? Then youâve come to the right place! E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems. Weâre intentional, weâre unapologetically curious and weâre 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life. The Senior PCB Layout Engineer is responsible for leading the physical implementation of complex, high-performance printed circuit boards from concept through production. This role requires deep expertise in multi-layer, high-speed, RF, and mixed-signal PCB layout, strong ownership of stackup and via architecture decisions, and direct engagement with PCB fabrication and assembly partners to ensure manufacturability, reliability, and cost efficiency.

Requirements

7+ years of hands-on PCB layout experience delivering complex designs from concept to production
Expert-level proficiency in PCB layout tools such as Altium Designer, Cadence Allegro
PCB stack-up development for digital, power, and RF designs
Impedance-controlled routing and transmission-line design
Power-distribution layout, plane design, and current-density management
Mixed-signal layout techniques (digital, analog, RF isolation and partitioning)
Component placement strategy for manufacturability, signal integrity, and thermal performance
Design-rule and constraint creation (clearances, lengths, impedance, vias, creepage/clearance)
Layout documentation (fab drawings, assembly drawings, layer stack tables, notes)
Footprint library creation and maintenance; Altium librarian responsibilities
Understanding of high-speed signal attenuation, dispersion, and copper-loss mechanisms
Crosstalk awareness and mitigation through routing and spacing techniques
RF parasitic effects (stray C/L/R) and reduction methods in layout
RF isolation techniques (ground fencing, stitching vias, partitioning, shielding)

Nice To Haves

Bachelorâs degree in electrical engineering, Computer Engineering, or a related field (Masterâs degree is a plus).
Familiarity with advanced PCB fabrication technologies such as mSAP (Modified Semi-Additive Process) and SLP (Substrate-Like PCB), including fine-line routing, small via structures, and associated DFM constraints
Working knowledge of Signal and power integrity simulation tools and DFM analysis workflows

Responsibilities

Lead PCB layout architecture for complex multi-layer designs (10â20+ layers) including high-speed digital, RF, analog, and power circuitry
Define and own stackups, impedance models, and via strategies (through, blind, buried, microvias, backdrilling)
Serve as the DFM authority for layout decisions, balancing electrical performance, cost, yield, and reliability
Perform and guide component placement optimizing signal integrity, power integrity , EMI/EMC, thermal, and mechanical performance
Route high-speed serial interfaces, differential pairs, controlled-impedance nets, and sensitive RF/analog signals
Design robust power distribution networks and grounding structures
Apply advanced shielding and isolation techniques for EMI/EMC control
Lead DFM/DFA reviews with PCB fabrication and assembly partners
Resolve complex DFM issues related to: o HDI structures and sequential lamination o Via consolidation, backdrilling, and drill count reduction o Stackup optimization for yield and cost
Optimize designs for manufacturability, reliability, and volume production
Work closely with electrical, mechanical, test, and manufacturing engineers throughout the product lifecycle
Support board bring-up, debug, ECOs, and production transitions
Mentor and technically guide junior PCB layout engineers
Create and review stackup drawings, fabrication notes, assembly notes, and manufacturing data packages (Gerber / ODB++)
Establish, maintain, and enforce PCB layout standards and best practices
Drive continuous improvement in layout quality, DFM compliance, and cost efficiency