Senior Mixed-Signal Silicon Engineer

Amazon LEO•San Diego, CA

About The Position

Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role: As Senior Mixed-Signal Silicon Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with an internal inter-disciplinary team, and third-party suppliers to drive key aspects of product definition, execution and optimization. You must be responsive, flexible and able to succeed within an open collaborative peer environment. As a member of the RFIC team, you will be responsible for the architectural definition, design, simulation, layout, and extracted simulation for transmit and receive mixed-signal circuit blocks including data converters and aspects of SERDES. Strong focus will be on creating power and cost optimized solutions for a given system performance. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Requirements

Master's degree in Electrical or Communications Engineering or a related field
7+ years of experience in mixed-signal design, preferably in an advanced node.
Experience in taking designs to volume production.
10+ years of experience in high-speed, low-power mixed-signal circuit design, layout and verification in the following : FinFET, SOI, BiCMOS, and Bulk CMOS technologies.
Knowledge of time-interleaved ADC architectures, digitally-assisted analog techniques.
Proficient in modeling circuits using Matlab, Verilog-A.
Knowledgeable in SERDES, data converter clock distribution design and jitter/phase noise concepts.
Proficiency with digital and mixed signal simulators, for example Incisive/Xcelium, VCS, AMS Designer.
Knowledge of the Cadence Virtuoso Design Framework, Virtuoso Schematic Editor, and Analog Design Environment (Explorer/Assembler).
Knowledge of programming in Python, Perl, and SKILL.
Effective written and verbal communication skills

Responsibilities

Design & optimize high-speed (>800Msps) medium resolution (5-8 bits) DACs & ADCs and other analog/mixed-signal blocks in deeply scaled CMOS technologies.
Explore circuit architectures for power/area/performance trade-offs.
Perform circuit layout, parasitic extraction and simulation.
Collaborate with cross-functional teams to define analog/digital interface requirements and define supporting digital functions.
Specify bench and production test plans for your design and enable volume production.