Senior Hardware Design Engineer

ESRhealthcare•Costa Mesa, CA

1d•$130,000 - $175,000•Onsite

About The Position

a growing Engineering Technology company located in Costa Mesa, CA, is seeking a Senior High-Speed Hardware Design Engineer. We are working directly with the hiring manager on this search assignment. This position is 5 days onsite. This company offers a competitive compensation package including base salary, annual bonus and Stock/RSU's. The Design Engineer will be responsible for designing and developing circuit boards, collaborating with cross-functional teams to ensure design accuracy, performing design validation and verification, and troubleshooting any design-related issues. The role also involves maintaining documentation and ensuring compliance with industry standards and will lead the development of Design Verification Test (DVT) platforms for validating high-speed transceiver technologies. This role is critical to ensuring signal integrity, performance, and compliance of next-generation wireline communication systems.

Requirements

Bachelor's or Master's degree or Ph.D. in Electrical Engineering, Computer Engineering, Physics or similar field
3-7+ years of experience in high-speed board design and validation
Proficiency in PCB design tools (e.g., Cadence Allegro, Altium or similar) and simulation tools (e.g., SI/PI analysis, HFSS, ADS)
Strong understanding of signal integrity, power integrity, and high-speed layout techniques
Experience with lab equipment and/or RF/Digital test methodologies
Experience integrating with lab instrumentation (e.g., VNA, BERT, Oscilloscopes) is preferred
Excellent problem-solving, documentation, and communication skills
Will consider candidates from various industries that are highly regulated such as Aerospace, Semiconductor, Medical Device, Pharma, consumer electronics, etc.

Nice To Haves

Experience with Serdes and/or Transceiver technologies or similar is a plus but not required
Experience with test automation and data analysis tools
Experience with Transceiver technologies or other high-speed design is a plus
Experience with the Design of DVT boards would be a plus
Familiarity with protocol compliance testing (e.g., IEEE, USB, PCIe)
Knowledge of thermal and mechanical constraints in board design
Automate test setups using scripting languages (e.g., Python, MATLAB) is a plus

Responsibilities

Architect and design high-performance DVT boards for validating transceiver technologies across multiple generations and protocols (e.g., PCIe, Ethernet, PAM4)
Collaborate with cross-functional teams including RFIC designers, system architects, packaging, and test engineers to define board-level requirements and validation strategies
Select components, create schematics, and oversee PCB layout optimized for signal integrity, power delivery, and thermal performance
Develop and execute test plans for electrical characterization, including jitter, eye diagram, BER, impedance, and crosstalk measurements
Debug and optimize board-level performance to meet stringent specifications for high-speed links
Document design processes, validation results, and provide feedback to silicon and system teams