Senior FPGA Engineer

iDirect GOVERNMENT

1d•Remote

About The Position

iDirectGov's hubs, satellite routers and network management software address the growing complexity of deploying and managing global IP networks. iDirect Government’s specialized technology includes transmission security (TRANSEC), Communication Signal Interference Removal (CSIR™) anti-jam technology and Open Antenna Modem Interface Protocol (OpenAMIP). We bring innovation, integration and intelligence to satellite-based IP communications that government and military organizations trust. By providing quality certifications with the most bandwidth-efficient, scalable and highly secure platform, we have rapidly become the technology provider of choice for military and government-driven mission-critical applications. We are seeking a team player with solid technical skills to work with our team of smart, creative, and dedicated engineering team-members. This position is based out of our Herndon, VA location with the option of a remote work schedule.

Requirements

8+ years of related experience
FPGA design experience using Verilog/System Verilog or VHDL languages targeting Xilinx/Altera FPGA’s
FPGA design experience with physical synthesis, static timing analysis, formal verification, power analysis, and other DRC centric tools
Experience with ModelSim/QuestaSim simulation tools
Experience with Altera/Xilinx development tools
Demonstrated ability to verify digital logic designs with System Verilog
Demonstrated understanding in timing closure, clock domain crossings, etc.
Understanding of Software Defined Radio (SDR) in regards to abstracting hardware
Experience with HW PCB tools, and HW test equipment to find and debug interfaces at a physical level
Ability to plan/perform analysis, studies/trade-offs in support of subsystem specification and hardware, FPGA and software design recommendations
Comfort working closely with HW/RF engineering specialties on design and configuration for RF communication systems
Experience in writing low-level test software such as C/C++, LabView, Python, etc.
Experience in Digital Signal Processing on FPGAs and SDR waveform implementation
Experience in SoC multi-processor designs specifically: Xilinx Zynq MPSoC, Xilinx Versal, Altera SoC FPGA
Experience with JTAG, DAC/ADC functional and RF parametric test development
Experience with high-speed interfaces such as JESD-204C, 10/40G Ethernet, Aurora, etc.
Familiarity in RF chain design and considerations
RF measurement experience and use of RF test and measurement Equipment such as Spectrum Analyzers, Network Analyzers, signal generators, etc.
Experience with both Altera and Xilinx design and verification tools
Bachelor's degree (BA/BS) in Electrical Engineering, Computer Engineering, or closely related field (must be from accredited college or university); MSEE/MSCE preferred
Active DoD security clearance or ability to obtain a secret level DoD clearance.

Nice To Haves

Experience with various control loops
Experience with FPGA Direct Memory Access IP (i.e. Xilinx DMA Engine or similar)
Experience with IEEE 1588/PTP networking
Experience implementing DSP algorithms in RTL
Experience with modulators/demodulators, forward error correction, adaptive channels, anti-jam algorithms, etc.
Familiarity with Networking, TCP/IP, UDP, DHCP, etc.
Experience with Xilinx and/or Altera high level synthesis tools
Experience with Matlab/Simulink or equivalent for development of DSP algorithms implemented in FPGA’s
Experience implementing DSP algorithms in System Generator or similar tools
Satellite Communication experience
Familiarity with Linux driver development or usage

Responsibilities

Designing and testing complex, high speed, FPGA designs
Designing and supporting top-level simulations
Translating requirements into FPGA architectures
Implementing and documenting FPGA designs using HDL (System Verilog, VHDL, etc.)
Supporting system integration and Test Engineering to produce functional design
Implementing and contributing to the architecture of next generation satellite communication systems such as DVB-S2X, LPI/LPD, 5G-NR, etc.
Designing the implementations for further advances in adaptive TDMA, SCPC return channels, including modeling and design of algorithms for real time embedded system implementation and Anti-Jam technologies
Supporting integration of FDMA and TDMA waveforms
Creating test plans to assure integrated performance meets specification
Writing internal and external facing documents about iDirect Government physical layer FPGA technology
Producing simulations of and designs for communication channels enabling the study of both channel improvement measures, such as pre-distortion/pre-coding as well as overall satellite communication system efficiency