Senior FPGA Engineer

KBR•Beavercreek, OH

1d•$160,000 - $210,000

About The Position

KBR is seeking a Senior FPGA / Digital Signal Processing Engineer to lead the design, development, integration, and debugging of advanced FPGA‑based communications, RF, and signal processing systems. This role involves hands‑on FPGA development, DSP algorithm implementation, embedded processor integration, and laboratory hardware bring‑up in a collaborative, mission‑focused environment. The ideal candidate brings deep experience with FPGA‑based DSP systems, strong analytical skills, and the ability to work independently across hardware, firmware, and software domains while providing technical leadership to the team.

Requirements

Bachelor’s degree in Electrical or Computer Engineering
8+ years of relevant experience in FPGA, DSP, communications, or RF signal processing systems
Proficiency in VHDL and/or Verilog
Experience targeting FPGA devices from AMD and/or other major vendors
Experience with FPGA development tools such as Vivado or similar toolchains
Familiarity with AXI‑based communication architectures
Strong understanding of DSP fundamentals, including sampling, filtering, and Fourier transforms
Experience working in a Linux development environment
Experience using Git or similar version control systems
Ability to obtain and maintain a U.S. DoD security clearance

Nice To Haves

Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field
Experience implementing DSP algorithms in both HDL and C/C++
Experience with SDR frameworks such as GNU Radio, RFNoC, RedHawk SDR, or OpenCPI
Experience integrating FPGA logic with embedded processors (e.g., ARM, MicroBlaze)
Familiarity with MATLAB/Simulink or similar modeling tools
Experience with advanced verification, simulation, or debug tools
Experience developing automation or prototyping tools using Python
Experience with AMD Zynq‑7000 or Zynq UltraScale+ RFSoC platforms
Experience with PetaLinux and/or Yocto build systems

Responsibilities

Design, implement, and maintain FPGA‑based DSP architectures for advanced communications and RF systems.
Lead the development and integration of FPGA logic across multiple Software‑Defined Radio (SDR) platforms, ensuring reliable performance and interoperability.
Implement, optimize, and debug real‑time DSP algorithms in hardware, including filtering, FFTs, modulation/demodulation, and synchronization functions.
Integrate FPGA designs with embedded processors, external peripherals, and system interfaces using standard communication protocols such as AXI.
Develop supporting software and firmware to command, control, and interface with FPGA‑based modules.
Perform hardware bring‑up, test, and debugging in laboratory environments using standard RF and digital test equipment.
Create and maintain simulation environments, testbenches, and verification workflows to validate functional and timing correctness of FPGA designs.
Collaborate with RF, software, firmware, and systems engineers to support end‑to‑end system integration and troubleshooting.
Analyze and optimize FPGA performance with respect to throughput, latency, resource utilization, and power constraints.
Develop scripts and automation tools to support FPGA build, test, and deployment workflows.
Support configuration management, documentation, and version control best practices throughout the FPGA development lifecycle.
Lead or participate in technical design reviews, provide engineering estimates, and contribute to system architecture decisions.
Mentor junior and mid‑level engineers and promote best practices in FPGA design, DSP implementation, and debugging techniques.