Senior Firmware Engineer I - Sensor Programs

Epsilon Systems Solutions, Inc.•Largo, FL

35d•Onsite

About The Position

Epsilon C5I (www.epsilonsystems.com/c5i), a division of Epsilon Systems Solutions, is a 100 percent employee-owned company founded in 1998 with more than 20 locations serving the Department of Defense, Department of Energy, Department of Homeland Security, non-profit and commercial customers. Epsilon C5I currently seeks to hire a Sr Firmware Engineer to support programs related to US DOD activities. As a Sr Firmware Engineer, you will be a member of an Integrated Program Team (IPT)) creating complex firmware solutions implemented in Field Programmable Gate Arrays (FPGAs), System on Chip (SOC), and Complex Programmable Logic Devices (CPLDs). Development activities may also include laboratory integration, test and evaluation, fault isolation of prototype hardware, and system qualification testing support. Successful candidates must be able to work independently and as part of a technical team and have effective oral and written communication skills. Successful candidates will also possess strong problem solving and critical thinking skills. This challenging position requires a diverse set of technical and task management skills and allows for the opportunity to contribute immediately to important, meaningful work. Desire an active TS clearance. Work is performed onsite in Largo, FL.

Requirements

Bachelor's degree in Electrical Engineering, or other closely related Science, Technology, Engineering or Mathematics (STEM) field.
Minimum 6+ years of prior relevant experience in digital hardware design and verification, or an advanced degree in a related field and minimum 4+ years prior experience
Successfully have completed several designs for various devices and applications
Experience with designing communication interfaces and bus standards (e.g., SPI, I2C, PCIe, UART, or Gb Ethernet)
Experience with test and verification approaches for designs using logic analyzers, high-speed oscilloscopes, signal generators, and/or target device debugging tools
Pursuant to the various government contractual requirements, all applicants must be U.S. Citizens.
Applicant must have the ability to obtain and maintain a DoD Top Secret Security Clearance.
Applicant must reside within commuting distance to Largo, FL or willing to relocate to the area.
Must have strong written communication skills, possess good people skills, demonstrate strong attention to detail and have the desire to work on a highly focused technical team of engineers
Possess effective communication and be able to collaborate with Customers, and cross-functional teams, document technical processes, and present solutions to stakeholders.
Must be able to prioritize tasks effectively, manage deadlines, and handle multiple projects simultaneously.
Excellent organizational skills and keen attention to detail, with the ability to multitask and prioritize effectively in a fast-paced, dynamic work environment.
Enthusiasm for learning and adapting to new technologies and methodologies.

Nice To Haves

Technical Leadership and experience using Earned Value Management (EVM)
Experience in cost and schedule estimation, and generating technical documentation related to contract deliverable items
Experience in embedded processors and SoC development for FPGA devices
Experience in FPGA design implementation with VHDL design language
Experience in designing applications that utilized red/black separation and redundancy concepts
Experience in OpenVPX technology including VITA standards
Experience in MATLAB and Simulink for digital signal processing designs that use floating and fixed-point numbers
Experience in the following Simulation Tools: Mentor Graphics, Synopsys, or Cadence
Experience in the following Development Tools: AMD (Xilinx), Intel (Altera), Lattice, or Microsemi (Actel) FPGA
Experience in TCL, Perl, or Python for Scripting
Experience in FPGA Development with Linux Operating System

Responsibilities

Develop system and/or FPGA architectures based on high level requirements
Target device trade studies, recommendations, and selection
Generate firmware requirements based on the system architecture
Generate firmware documentation that describes the firmware architecture
Design Hardware Description Language (HDL) based digital circuits that are structured and readable
Build test benches to verify/test the HDL based design
Generate constraints for target device
Create scripts to automate build, integration, and test activities
Verify target device functionality in laboratory environment

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