We are seeking an experienced Senior Engineer I - Test to join our Test Engineering team at the San Jose, CA office. This position is part of the Microcontroller BU Operations team, supporting the FPGA business unit, which focuses on high reliability, secured and low power FPGA for use in different application segments. In this role, the candidate will be responsible for implementing and developing ATE test solutions and sustaining test programs and its hardware. The ideal candidate will have a background with Teradyne J750 or similar ATE experience in wafer sort and final test ATE test program on both development and sustaining, and a strong ability to solve technical problems and manage projects and its priorities.
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Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees