Senior Engineer I - Test

Microchip • San Jose, CA

4d

About The Position

We are seeking an experienced Senior Engineer I - Test to join our Test Engineering team at the San Jose, CA office. This position is part of the Microcontroller BU Operations team, supporting the FPGA business unit, which focuses on high reliability, secured and low power FPGA for use in different application segments. In this role, the candidate will be responsible for implementing and developing ATE test solutions and sustaining test programs and its hardware. The ideal candidate will have a background with Teradyne J750 or similar ATE experience in wafer sort and final test ATE test program on both development and sustaining, and a strong ability to solve technical problems and manage projects and its priorities. Define and implement manufacturing test solutions for semiconductor wafer sort and final test Develop test strategy to cover specification, design and qualification of silicon, test hardware/equipment Investigate and introduce new manufacturing test technology, automation and methodology to improve production efficiency Analyze electronics and components for failures in manufacturing and operations. Complete root cause analysis and implement fixes to improve yield, performance, and/or manufacturability Proactively identify and mitigate production risks and troubleshoot problems and defects Experience in developing and simulation of multisite probe cards Familiar with laboratory equipment such as oscilloscopes, logic/spectrum analyzers, power supplies, multimeters, and so on.

Requirements

• Bachelor's or Master's degree in an engineering discipline with 5 years of experience with semiconductor ATE test engineering
• Experience at wafer sort and final test development.
• Proficient in Visual Basic and Perl programming skills or similar is a must
• Understanding of with post-silicon validation and verifications.
• Familiarity with semiconductor back-end manufacturing
• Excellent communication skills and a Team player
• Knowledgeable of digital and analog electronics and with board-level design and debug

Nice To Haves

• Experience with Teradyne J750 is a plus.
• Exposure in programming hardware system is a plus

Responsibilities

• Define and implement manufacturing test solutions for semiconductor wafer sort and final test
• Develop test strategy to cover specification, design and qualification of silicon, test hardware/equipment
• Investigate and introduce new manufacturing test technology, automation and methodology to improve production efficiency
• Analyze electronics and components for failures in manufacturing and operations.
• Complete root cause analysis and implement fixes to improve yield, performance, and/or manufacturability
• Proactively identify and mitigate production risks and troubleshoot problems and defects
• Experience in developing and simulation of multisite probe cards
• Familiar with laboratory equipment such as oscilloscopes, logic/spectrum analyzers, power supplies, multimeters, and so on.

Benefits

• We offer a total compensation package that ranks among the best in the industry.
• It consists of competitive base pay, restricted stock units, and quarterly bonus payments.
• In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature.
• Find more information about all our benefits at the link below:
• Benefits of working at Microchip

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees