Senior Engineer I - Physical Design

Microchip Technology Inc. • Chandler, AZ

1d • $57,000 - $139,000

About The Position

To support Physical Design related project activities for the Microcontroller and Wireless Business Units in Microchip. These products focus on 32-bit mixed signal microcontrollers and microcontrollers with integrated wireless radios. Job activities: Implement all aspects of physical design such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance, EMIR, and physical verification. Work on place and route methodologies and low power methodologies. Collaboration with multiple teams across a geographically diverse company to achieve desired design goals. Detailed job functions include: Timing closure support to maximize process node capability. Clock tree setup/debug and synthesis for optimal QoR. General physical implementation procedures. Multi-voltage island-based floorplan design and support. Flow development and automation implementation. Delivering Physical Verification-clean designs. Die size estimation and Bond out approval. Interfacing with external vendors and IP sources to resolve problems. Working with members from international design/implementation teams.

Requirements

• The successful candidate will have a Bachelor’s Degree in Electrical or Electronics Engineering and a strong engineering background.
• 5+ years of relevant physical design experience
• Strong understanding of VLSI and related concepts
• Understand logic synthesis and timing concepts (setup, hold, uncertainty, etc)
• Scripting skills in any programming language (TCL and Pyton preferred)
• Basic design knowledge of RTL (VHDL/VERILOG) coding
• Able to work independently under local project lead/supervisor mentorship
• Excellent debugging and analytical skills
• Good verbal and written communication skills and strong interpersonal skills

Responsibilities

• Implement all aspects of physical design such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance, EMIR, and physical verification.
• Work on place and route methodologies and low power methodologies.
• Collaboration with multiple teams across a geographically diverse company to achieve desired design goals.
• Timing closure support to maximize process node capability.
• Clock tree setup/debug and synthesis for optimal QoR.
• General physical implementation procedures.
• Multi-voltage island-based floorplan design and support.
• Flow development and automation implementation.
• Delivering Physical Verification-clean designs.
• Die size estimation and Bond out approval.
• Interfacing with external vendors and IP sources to resolve problems.
• Working with members from international design/implementation teams.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature.
• Find more information about all our benefits at the link below: Benefits of working at Microchip

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level