Senior Electrical Engineer - ASIC/FPGA (Hybrid)

RTX

2d•Hybrid

About The Position

Our customers depend on us for graphics systems for pilot training, intelligent and secure communications, missionized systems for specialized aircraft and spacecraft and collaborative space solutions. By joining our team, you’ll have your own critical part to play in ensuring our customers succeed today while anticipating their needs for tomorrow. Are you up for the challenge? Join our mission today. This position is for a motivated Senior Electrical or Computer Engineering candidate to be involved in the design, implementation, verification, and integration of a wide variety of high-performance digital ASICs, FPGAs, and circuit boards applied to computer graphics and supporting communication signal processing and information assurance products.

Requirements

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience or in absence of a degree, 9 years of relevant experience
Must have or be capable of obtaining a US Department of Defense (DoD) security clearance. Candidate selected will be subject to a government security investigation/reinstatement and must meet eligibility requirements
RTL coding and simulation in Verilog or VHDL
Digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure

Nice To Haves

Testbench development for the verification of RTL blocks using SystemVerilog
Proficiency using ASIC and/or FPGA simulation and synthesis tools (e.g., ModelSim, Synplify, Quartus, Vivado, or other FPGA-specific tools)
Familiarity with revision control concepts and tools (e.g., Git, Subversion)
Ability to work with minimal supervision, collaborate with engineers of varied skills and backgrounds, and support projects with aggressive schedules and frequent milestones
Strong oral and written communication skills with the ability to document and present work and status
Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, SystemVerilog)
ASIC / FPGA lab validation using advanced laboratory equipment
Design for Test (DFT) and manufacturability experience
Experience with Unix, scripting, C/C++, and/or Perl

Responsibilities

Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration
Recommend new tools and practices for continuous improvement in the group’s ASIC / FPGA design flow
Contribute to engineering estimates for new program pursuits
Provide technical leadership for project design teams by breaking down work, planning activities, and reporting status

Benefits

Medical, dental, and vision insurance
Three weeks of vacation for newly hired employees
Generous 401(k) plan that includes employer matching funds and separate employer retirement contribution, including a Lifetime Income Strategy option
Tuition reimbursement program
Student Loan Repayment Program
Life insurance and disability coverage
Optional coverages you can buy pet insurance, home and auto insurance, additional life and accident insurance, critical illness insurance, group legal, ID theft protection
Birth, adoption, parental leave benefits
Ovia Health, fertility, and family planning
Adoption Assistance
Autism Benefit
Employee Assistance Plan, including up to 10 free counseling sessions
Healthy You Incentives, wellness rewards program
Doctor on Demand, virtual doctor visits
Bright Horizons, child and elder care services
Teladoc Medical Experts, second opinion program
Eligible for relocation assistance