Senior Distinguished Engineer

Marvell Technology•Santa Clara, CA

4d•Onsite

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact At Marvell Technology, we are defining the future of data infrastructure. The Network Switch Business Unit (NSBU) is the powerhouse behind the world’s most advanced cloud, AI, 5G, and enterprise networking products. Our solutions are the backbone of hyperscale data centers, generative AI fabrics, and global-scale networks that demand uncompromising performance. As a Senior Distinguished Engineer, you will be one of the most influential technical leaders in the organization—shaping the architecture of next-generation, high-performance switch ASICs that will set the pace for the entire semiconductor industry. Your work will directly impact the scale-out architectures powering the next decade of AI, cloud, and connectivity growth. This is a role for bold innovators who want to push boundaries, create what hasn’t been built before, and influence the technical direction of a multi-billion-dollar product line. Why Marvell? Why Now? Marvell is not just another semiconductor company—we are the partner of choice for hyperscalers, AI innovators, and global network operators. Here’s why top engineers choose Marvell: • We are at the center of AI infrastructure growth, delivering the networking technology that fuels large-scale GPU clusters and AI fabrics. • Our scale-out architectures are redefining what's possible in high-bandwidth, low-latency switching. • We move fast, with an engineering-led culture that prizes creativity, bold ideas, and technical excellence. • You will shape products used by every major cloud and AI provider—impacting the entire digital economy. • Your innovations won’t just ship—they will scale, shaping global infrastructure for years to come. If you're driven to architect at the edge of what’s technologically possible and want your work to influence the entire semiconductor and cloud ecosystem, Marvell is where you belong. What You Can Expect In this role, you will have unmatched technical visibility and the opportunity to drive architectural decisions at the highest levels. You will:

Requirements

Educational Background Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field required.
Master’s or Ph.D. strongly preferred.
Experience & Accomplishments 15+ years of experience in ASIC architecture and design, preferably in networking, switching, or high-performance SoCs.
Demonstrated leadership in driving complex ASIC or multi-die products from concept through delivery.
Strong track record of innovation at scale—patents, publications, or industry-recognized contributions.
Technical Mastery Deep expertise in: System-level architecture for networking ASICs Multi-die systems and advanced die-to-die protocols Chiplet/heterogeneous integration techniques High-performance switching pipelines, memory subsystems, packet processing, traffic management and buffer management Strong understanding of system software interaction, control-plane integration, and full-stack implications.
Leadership & Collaboration Exceptional communication and influence skills—able to drive alignment at senior levels.
Comfortable operating in a fast-paced, highly innovative environment.
Proven mentoring capabilities with a passion for developing engineering talent.

Responsibilities

Lead Architectural Vision Serve as the principal architect for advanced networking ASICs focused on performance, scale-out capabilities, power efficiency, and silicon leadership.
Define long-term architectural roadmaps for Marvell's next-gen switching platforms serving AI clusters, hyperscale cloud, carrier, and enterprise markets.
Pioneer Multi-Die and Chiplet Innovation Architect multi-die systems, including die-to-die (D2D) high-bandwidth interconnects that redefine how large-scale ASICs are built.
Champion chiplet-based methodologies that increase design modularity, accelerate development cycles, and unlock new product families.
Drive Cross-Functional Systems Thinking Partner closely with hardware, software, packaging, validation, and system engineering teams to deliver coherent, system-level solutions.
Represent the architecture function in executive-level technical reviews and customer engagements.
Elevate Engineering Excellence Mentor senior and junior engineers, helping develop the next generation of Marvell’s technical leaders.
Foster a culture of innovation, rigor, and forward-looking design across the organization.