We are seeking a Senior Director of Engineering to lead and grow our package design team within CHS, driving next-generation high-performance compute (HPC) package and system architectures for client compute and datacenter platforms. This leader will own the end-to-end package design strategy — from concept through production — and will be responsible for building a world-class team that delivers differentiated solutions leveraging advanced 2.5D and 3D integration technologies. The ideal candidate brings deep technical expertise in multi-chiplet packaging, silicon interposer and bridge architectures, and high-density interconnect design, combined with a proven track record of leading large, cross-functional engineering organizations. The role requires strong competency in high-speed IO system design, signal and power integrity simulation, and thermal/mechanical co-design for advanced package substrates. The successful candidate will partner closely with silicon design, platform architecture, and manufacturing teams to define package technology roadmaps that meet aggressive performance, power, and cost targets across Qualcomm's compute portfolio. Experience navigating OSAT and foundry ecosystems, driving design-for-manufacturability, and influencing industry standards is highly valued. This is a senior leadership position that demands both strategic vision and hands-on technical credibility.
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Job Type
Full-time
Career Level
Senior
Education Level
Ph.D. or professional degree