Senior DFD Methodology Engineer
This job is no longer available
There are still lots of open positions. Let's find the one that's right for you.
About The Position
NVIDIA is seeking a Senior DFT Engineer to join our innovative Design-for-Test Engineering team. This role is pivotal in crafting creative solutions for DFT architecture, verification, and post-silicon validation on some of the industry's most complex semiconductor chips. As a Senior DFT Engineer, you will be responsible for implementing state-of-the-art designs in test access mechanisms, which include scan dump, array dump, and JTAG methodology. You will collaborate with cross-functional teams to develop and deploy DFD methodologies and tools for our next-generation products. Additionally, you will have the opportunity to mentor junior engineers on test designs and trade-offs, focusing on both cost and quality. In this role, you will leverage your expertise in DFT, DFD, or related domains to ensure the successful verification and validation of test sequences and logic on complex, multi-million gate designs. Your analytical skills will be essential in silicon debug and bring-up on ATE and system-level testing, where you will work with pattern formats, failure processing, and test program development. You will also utilize your knowledge of scan architecture and Built-In Self-Test (BIST) methodologies, including memories and IOs, to enhance our testing processes. NVIDIA is committed to fostering a diverse work environment and is proud to be an equal opportunity employer. We value creativity and autonomy, and we are looking for individuals who are eager to tackle rare challenges in the field of semiconductor engineering. Join us in amplifying human imagination and intelligence through groundbreaking technology.
