Senior Design Verification Engineer

Microsoft Corporation-posted 27 days ago
Full-time • Mid Level
Hillsboro, OR
5,001-10,000 employees
Publishing Industries
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Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AISiE team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for a Senior Design Verification Engineer for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Senior Design Verification Engineer to join the team.

  • Establish yourself as an integral member of a design verification team for the development of AI components with focus on verifying functions and features.
  • Lead a pre-silicon verification team for the development of custom Intellectual Property (IP) and Subsystem (SS) components with focus on architectural and micro-architectural based functions and features.
  • Collaborate with the architecture and design teams to ensure the implementation meets both architectural and micro-architectural intent.
  • Write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness.
  • Develop Universal Verification Methodology (UVM) components to interface between test code and verification simulation environments.
  • Apply Agile development methodologies including code reviews, sprint planning, and feature deployment.
  • Provide technical leadership through mentorship and teamwork.
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion.
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
  • 10+ years of industry experience in design verification with a proven track record of delivering complex Central Processing Unit(CPU), Graphics Processing Unit(GPU) or System on Chip(SoC) IPs.
  • Demonstrated experience in one or more of the following: interconnect fabrics, Network on Chip(NOCs), AXI-4 protocol base other complex IP/blocks or subsystems.
  • Experience with IP/SOC verification for a full product cycle from definition to silicon, including writing IP/block or subsystem level architecting DV environment, estimating efforts, test plans, developing tests, debugging failures and coverage signoff.
  • Experience of working on AI/Machine Learning (ML)SoCs
  • In depth knowledge of verification and debug principles, testbenches, Universal Verification Methodology (UVM) or C based test environments.
  • Experience in post-silicon bring-up of complex SoCs involving complex NOC.
  • Working knowledge of writing assertions, coverage and / or formal verification.
  • Knowledge of industry standard bus interfaces such as Advanced Microcontroller Bus Architecture (AMBA) Advanced eXtensible Interface (AXI)  protocols.
  • Background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments.
  • Scripting languages such as Zsh, Bash, Python or Perl.
  • Proficient communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams within Microsoft and with external vendors.
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