This individual independently plans, performs the moderately-defined responsibility for the development of test plans and the functional verification on hardware at the IP, sub-system, SoC and system/architecture level for wireless and wired technologies using an object-oriented verification language called SystemVerilog in an OVM or UVM verification environment. Performs Physical and/or Mac Layer verification in developing the methodology architectural components and verification infrastructure. Responsibilities include working with the Architects, ASIC designers and Software Engineers on SoCs for mobile handset and consumer electronic applications. Writes and implement feature based test plans, debug test failures, run regression and close test plan targets. Acts as a strong contributor at design reviews and project meetings. Telecommuting may be permitted. When not telecommuting, must report to Qualcomm's office location(s) in San Diego, CA.