Senior Design Verification Engineer - QGOV

Qualcomm • San Diego, CA

68d • $115,600 - $173,400

About The Position

Qualcomm Technologies, Inc. is seeking an experienced engineer to join our Engineering Group, specifically in ASICS Engineering. The role requires familiarity with RTL design in Verilog and System Verilog, and involves developing verification methodology to ensure a scalable and portable environment across simulation and emulation. The engineer will be responsible for developing test plans to verify hardware building blocks, design macros, and standard interfaces such as PCIE, DDR, USB, I2C, and SPI. The position entails owning end-to-end design verification tasks, including coding test benches and test cases, writing assertions, running simulations, and achieving all coverage goals. The candidate will explore innovative design verification methodologies, including formal, simulation, and emulation-based approaches, to continuously enhance the quality and efficiency of test benches. Additionally, the engineer will develop and maintain the emulation environment to collect metrics related to the emulation environment. This position requires full-time presence in San Diego, five days a week, and applicants must be U.S. citizens eligible for government security clearance.

Requirements

• 5+ years of work experience with RTL/FPGA design (Verilog) and embedded system architecture.
• 5+ years of design verification, emulation, and debug experience with simulation and emulation.
• Relevant experience of 2-3+ years in design, verification, or implementation.

Nice To Haves

• Knowledge of communication protocols such as AXI4-x, DDRx, PCIe.
• Strong System Verilog/UVM based verification skills.
• Good understanding of chip-level functional model building.
• Experience in HVL such as System Verilog, UVM/OVM & System C.
• Experience with emulation platforms like Palladium, Zebu, Veloce, FPGAs.
• Experience with debugging tools such as JTAG and lab test equipment.

Responsibilities

• Develop verification methodology ensuring scalable and portable environment across simulation and emulation.
• Develop test plans to verify hardware building blocks, design macros, and standard interfaces.
• Own end-to-end design verification tasks from coding test benches and test cases to running simulations.
• Explore innovative design verification methodologies to enhance quality and efficiency.
• Develop and maintain emulation environment to collect metrics.
• Execute verification plans, including design bring-up and regression enabling.

Benefits

• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants.
• Comprehensive benefits package designed to support work-life balance.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Industry: Computer and Electronic Product Manufacturing
• Education Level: Bachelor's degree