Senior Design Engineer

Micron Technology • San Jose, CA

1d

About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions! You will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe and Process Integration to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction! As an Engineer – NVE Design at Micron Technology, Inc., you will be a core technical individual contributor in design and validation of the on-chip controller and mixed signal circuitry in NAND FLASH chips. In this highly visible and challenging role, your responsibilities will include architecture development and product definition, test plan, system integration and verification. Some RTL design verification of the controller hardware, verification and development of firmware code for NAND internal operations and full-chip Verilog Verification.

Requirements

• Proficiency in System Verilog/SVA/Verilog/UVM is preferred
• Good understanding of at least one emulation platform such as Cadence Palladium, Mentor Veloce, or Synopsys Zebu
• Perform emulation FPGA builds for a variety of SoC Designs
• Explore tradeoffs to size, emulation speed, and debuggability of emulation builds
• Familiarity with model evaluation, dataset creation, and feature engineering.
• Bachelor’s Degree with 5+ years of Design experience or Master's Degree in Electrical Engineering with 3+ years of experience
• Experience building automation pipelines or tooling in an engineering environment.
• Experience with working on larger datasets using Python common ML/data libraries
• Experience with developing new transactors and hybrid emulation model

Responsibilities

• Contribute towards Random sequence test bench development by reviewing block level spec documents for new and legacy features
• Developing and supporting SVA (System Verilog Assertions) Test Bench to perform sub-system and full chip Verilog verification using UVM
• Perform RTL Code coverage and review Functional Coverage bins to achieve coverage goals
• Implement/Enhance/Support multiple automation tools to improve DV efficiency (PERL, Python)
• Performing verification processes with modeling and simulation using industry standard simulators
• Contributing to cross group communication to work towards standardization and group success
• Development of synthesizable nand models for FPGA emulation of ASIC Controller

Benefits

• Additional compensation may include benefits, bonuses and equity.
• Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level