A Senior ASIC/FPGA Hardware Engineer for Cryptographic Systems architects, specifies, and ensures proper design & implementation of hardware-based security solutions. The engineer develops the architecture and specification for ASIC or FPGA-based hardware designs. They translate those requirements to front-end RTL designers and guide the back-end implementation team to achieve a secure hardware design. The engineer also works with systems-level designers to develop documentation, test plans, and software interfaces to the hardware solution. The candidate must demonstrate knowledge of cryptography systems and hardware security, to include: • Asymmetric/public key cryptosystems such as ECC, RSA etc. • Symmetric cryptography such as AES (and its block cipher modes), MAC etc. • Cryptographic protocols/schemes such as key exchange, digital signature, key wrap etc. • Security design such as memory isolation, secure enclave etc. • Secure protocols such as secure boot, attestation, key split, certificates, MFA etc.