About the position
Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter! If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders. Lightmatter is (re)inventing the future of computing with light! The ideal candidate for this position will be a meticulous and systematic electrical engineer with a solid foundation in analog principles. They will have a passion for chip engineering and physical implementation, and will be eager to lead the top-level design of our PASSAGE photonics chips. This role will require close collaboration with cross-functional teams to integrate Lightmatter's IPs into the top-level design and manage the chip development process from floor planning to tapeout.
Responsibilities
- Support micro-architecture development with chip architects by conducting feasibility studies
- Collaborate with members of our design engineering teams (packaging, digital, analog, photonics) to define chip partitions
- Responsible for the top-level design including schematic/layout hierarchy and floor planning
- Work cross-functionally with analog, digital, and photonics block designers to integrate circuit IPs
- Plan for Power Delivery Network (PDN) and support its design implementation
- Plan for ESD strategy and support its design implementation
- Plan for Test strategy and support its design implementation
- Oversee the layout and the verification of the design
- Complete all sign-off checks and requirements to ensure successful tapeout
Requirements
- MS with 6+ years of relevant industry experience, or PhD and 3+ years of relevant industry experience
- Semiconductor industry experience in Analog/Mixed-signal IC design
- Experience with integration flows and their challenges
- Hands-on experience working on physical design implementation (analog layout and digital PnR)
- Experience participating in the design of multiple analog/mixed-signal chips and their tape-outs
- Experience with Cadence Design Environment
- Strong ability to work collaboratively with people across multiple functional areas
Nice-to-haves
- Experience with power grid and ESD implementation and verification is a plus
- Experience designing chips with 2.5/3D packaging is a plus
- Working knowledge of RTL, PnR, Modeling, and Design verification flows is a plus
Benefits
- Comprehensive Health Care Plan (Medical, Dental & Vision)
- Retirement Savings Matching Program
- Life Insurance (Basic, Voluntary & AD&D)
- Generous Time Off (Vacation, Sick & Public Holidays)
- Paid Family Leave
- Short Term & Long Term Disability
- Training & Development
- Commuter Benefits
- Flexible, hybrid workplace model
- Equity grants
