RISCV CPU Systems Architecture/RTL Engineer – Senior Level

Qualcomm • Santa Clara, CA

115d • $198,700 - $298,100

About The Position

We are hiring talented engineers for RISCV CPU RTL development targeting high-performance, low-power devices. In this role, you will contribute to architecture and product definition and be responsible for microarchitecture and RTL execution of CPU system features. These include, but are not limited to: System architecture - configuration access protocols and ordering requirements, timer and interrupt architecture, Power management architecture, Debug and trace architecture.

Requirements

• Master’s degree in computer or electrical engineering with 10+ years of experience in CPU RTL or a related field
• Deep knowledge of microprocessor architecture, with expertise in one or more of the following areas: RISCV CPU system features: timer synchronization, interrupt controller, configuration access protocols, RAS and safety mechanisms
• Architecture and performance monitoring, telemetry architecture
• Power management: active and idle power strategies, limit and clock architecture
• Debug/trace architecture, scan-dump, and memory dump mechanisms
• Strong expertise in power management for high-performance systems, including active power, idle low power, and silicon/system limits
• Proven experience in defining and developing debug features for high-performance designs
• Excellent technical documentation skills, along with strong written and verbal communication abilities
• Proficiency in Verilog and/or VHDL, and experience with simulators and waveform debugging tools
• Solid understanding of logic design principles, including timing and power implications

Nice To Haves

• Familiarity with RISCV CPU architecture and ISA
• Understanding of low-power microarchitecture techniques
• Knowledge of high-performance design strategies and trade-offs in CPU microarchitecture
• Experience with scripting languages such as Perl or Python

Responsibilities

• Explore performance and power optimization opportunities in collaboration with the CPU modeling team
• Develop high-level architecture and microarchitecture specifications that translate into RTL design
• Own RTL development: assess and refine RTL to meet power, performance, area, and timing goals
• Support functional verification: assist the design verification team in executing verification strategies
• Deliver design: collaborate with cross-functional engineering teams to validate physical design aspects including timing, area, reliability, testability, and power
• Work closely with software, firmware, and platform teams to enable CPU system features in products

Benefits

• $198,700.00 - $298,100.00 salary range
• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package designed to support success at work, at home, and at play

What This Job Offers

• Career Level: Senior
• Education Level: Master's degree
• Number of Employees: 5,001-10,000 employees