RFIC Layout Engineer

Apple • San Diego, CA

122d • $163,300 - $290,100

About The Position

The Wireless SoC Radio Team designs state-of-art highly energy efficient CMOS radios, from RF to bits. To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and mixed-signal blocks from RF front-end amplifiers to data converters, including baseband filters, baseband and RF phase-locked loops, crystal oscillators, and bandgap references. We are working on new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. In this role, you will work closely with the RFIC design team to layout and verify custom RF and analog IP for complex SoC products. You will have a critical impact on developing Apple's state-of-the-art radios and getting them into hundreds of millions of products.

Requirements

• BS and 10+ years of relevant industry experience.
• FinFet experience.

Nice To Haves

• Experience in custom RF/analog layout for radio transceivers with extensive knowledge of deep sub-micron CMOS.
• Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing.
• Solid understanding of RC delay, electromigration, and coupling.
• Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD, WPE, etc.
• High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. in FinFet Technology.
• Knowledge of CADENCE layout tools.
• Excellent communication skills and ability to work with cross-functional teams.
• Capability to lead other layout engineers for top-level integration.
• Ability to recognize failure prone circuit and layout structures and proactively work with circuit designers for the best approach to resolve problems.
• Scripting skills in PERL or SKILL.

Responsibilities

• Detailed transistor-level layout of RF and analog circuit blocks including LNA, mixers, PLL, LO generation, modulators, power amplifiers, ADC/DAC, baseband filters, and bandgap/bias/LDO.
• Block level layout through full verification flow including extraction, DRC, LVS, and DFM checking.
• Co-work with designers on block level floorplanning.
• Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling.

Benefits

• Comprehensive medical and dental coverage.
• Retirement benefits.
• A range of discounted products and free services.
• Reimbursement for certain educational expenses — including tuition.
• Discretionary bonuses or commission payments.
• Relocation assistance.

What This Job Offers

• Career Level: Senior
• Industry: Computer and Electronic Product Manufacturing
• Education Level: Bachelor's degree