RFIC Layout Design

IC Enable•Richardson, TX

3d•Hybrid

About The Position

For over 20 years IC Enable has successfully provided design IP, IC products, services, and platform solutions to demanding customers ranging from startups to Fortune 50 members. Our design and product offerings focus on high reliability, mixed-signal and digital markets while our platform solutions focus on IDM, foundry and IP providers. Now is an exciting time to join our team as we continue to change the industry through experience in technology development, full-custom ASIC / SOC and electronics development across the Semiconductor, Medical and Defense industries, including some of the most challenging fabrication processes and product applications. You will work along our layout engineers and RF designers to build detailed transistor-level layout of RF and analog circuit blocks including bandgap/bias/LDO, ADC/DAC, baseband filters, modulators, power amplifiers, PLL, LO generation, LNA, and Mixer. You will also be responsible to provide highly quality layout to pass our verification flows including extraction, DRC, LVS, and DFM checking. Layout quality will be reviewed for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling. At IC Enable we know that our most valuable asset is our team. We are seeking a candidate who is ready to dive in to our culture and grow with our team. We build our team around those that are humble, hungry and smart! IC Enable is an Equal Opportunity Employer

Requirements

Minimum 5 years of Industry Experience
FinFET experience
Experience with advanced technology nodes (7nm and below)
High proficiency in interpreting CALIBRE DRC, ERC, and LVS
Proficient with CADENCE layout tools
Strong background in custom RF/analog layout for transceivers and deep sub-micron CMOS technologies

Nice To Haves

Knowledge of guard rings, DNW, PN junctions, and advanced process effects (LOD, WPE, etc.)
Skilled in layout techniques for device matching, parasitic reduction, RF shielding, and high-frequency routing
Solid understanding of RC delay, electromigration, and signal coupling
Strong communication skills and ability to collaborate with designers and layout teams

Responsibilities

build detailed transistor-level layout of RF and analog circuit blocks including bandgap/bias/LDO, ADC/DAC, baseband filters, modulators, power amplifiers, PLL, LO generation, LNA, and Mixer
provide highly quality layout to pass our verification flows including extraction, DRC, LVS, and DFM checking
Layout quality will be reviewed for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling